maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Let targets adjust physical output- and anti-deps 

Differential Revision: https://reviews.llvm.org/D78380
This commit is contained in:
Fraser Cormack 2020-04-17 16:48:59 +01:00
parent b1097e29d3
commit c3a292961d
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
View File

@ -294,6 +294,8 @@ void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) {
if (MRI.isConstantPhysReg(Reg))
return;
const TargetSubtargetInfo &ST = MF.getSubtarget();
// Optionally add output and anti dependencies. For anti
// dependencies we use a latency of 0 because for a multi-issue
// target we want to allow the defining instruction to issue
@ -311,14 +313,12 @@ void ScheduleDAGInstrs::addPhysRegDeps(SUnit *SU, unsigned OperIdx) {
if (DefSU != SU &&
(Kind != SDep::Output || !MO.isDead() ||
!DefSU->getInstr()->registerDefIsDead(*Alias))) {
if (Kind == SDep::Anti)
DefSU->addPred(SDep(SU, Kind, /*Reg=*/*Alias));
else {
SDep Dep(SU, Kind, /*Reg=*/*Alias);
SDep Dep(SU, Kind, /*Reg=*/*Alias);
if (Kind != SDep::Anti)
Dep.setLatency(
SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
DefSU->addPred(Dep);
}
ST.adjustSchedDependency(SU, OperIdx, DefSU, I->OpIdx, Dep);
DefSU->addPred(Dep);
}
}
}