forked from OSchip/llvm-project
Fix a bug where we were counting the alias sets as completely used
registers for fast allocation a different way. This has us updating used registers only when we're using that exact register. Fixes rdar://9207598 llvm-svn: 129711
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@ -396,7 +396,6 @@ void RAFast::definePhysReg(MachineInstr *MI, unsigned PhysReg,
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PhysRegState[PhysReg] = NewState;
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for (const unsigned *AS = TRI->getAliasSet(PhysReg);
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unsigned Alias = *AS; ++AS) {
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UsedInInstr.set(Alias);
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switch (unsigned VirtReg = PhysRegState[Alias]) {
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case regDisabled:
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break;
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@ -734,10 +733,6 @@ void RAFast::handleThroughOperands(MachineInstr *MI,
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if (!Reg || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue;
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DEBUG(dbgs() << "\tSetting reg " << Reg << " as used in instr\n");
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UsedInInstr.set(Reg);
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for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {
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DEBUG(dbgs() << "\tSetting alias reg " << *AS << " as used in instr\n");
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UsedInInstr.set(*AS);
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}
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}
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// Also mark PartialDefs as used to avoid reallocation.
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@ -0,0 +1,15 @@
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; RUN: llc < %s -O0 -verify-machineinstrs -regalloc=fast
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; Previously we'd crash as out of registers on this input by clobbering all of
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; the aliases.
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32"
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target triple = "thumbv7-apple-darwin10.0.0"
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define void @_Z8TestCasev() nounwind ssp {
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entry:
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%a = alloca float, align 4
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%tmp = load float* %a, align 4
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call void asm sideeffect "", "w,~{s0},~{s16}"(float %tmp) nounwind, !srcloc !0
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ret void
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}
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!0 = metadata !{i32 109}
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