[CUDA][SPIRV] Assign global address space to CUDA kernel arguments

(resubmit https://reviews.llvm.org/D119207 after fixing the test for
some build settings)

This patch converts CUDA pointer kernel arguments with default address
space to CrossWorkGroup address space (__global in OpenCL). This is
because Generic or Function (OpenCL's private) is not supported as
storage class for kernel pointer types.

Differential revision: https://reviews.llvm.org/D120366
This commit is contained in:
Shangwu Yao 2022-02-24 20:51:43 -08:00 committed by Justin Lebar
parent ca80c24386
commit c2f501f395
No known key found for this signature in database
GPG Key ID: 13778D367B90F8BF
3 changed files with 26 additions and 8 deletions

View File

@ -144,16 +144,16 @@ public:
// FIXME: SYCL specification considers unannotated pointers and references // FIXME: SYCL specification considers unannotated pointers and references
// to be pointing to the generic address space. See section 5.9.3 of // to be pointing to the generic address space. See section 5.9.3 of
// SYCL 2020 specification. // SYCL 2020 specification.
// Currently, there is no way of representing SYCL's and HIP's default // Currently, there is no way of representing SYCL's and HIP/CUDA's default
// address space language semantic along with the semantics of embedded C's // address space language semantic along with the semantics of embedded C's
// default address space in the same address space map. Hence the map needs // default address space in the same address space map. Hence the map needs
// to be reset to allow mapping to the desired value of 'Default' entry for // to be reset to allow mapping to the desired value of 'Default' entry for
// SYCL and HIP. // SYCL and HIP/CUDA.
setAddressSpaceMap( setAddressSpaceMap(
/*DefaultIsGeneric=*/Opts.SYCLIsDevice || /*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
// The address mapping from HIP language for device code is only defined // The address mapping from HIP/CUDA language for device code is only
// for SPIR-V. // defined for SPIR-V.
(getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice)); (getTriple().isSPIRV() && Opts.CUDAIsDevice));
} }
void setSupportedOpenCLOpts() override { void setSupportedOpenCLOpts() override {

View File

@ -10320,10 +10320,10 @@ void CommonSPIRABIInfo::setCCs() {
} }
ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const { ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
if (getContext().getLangOpts().HIP) { if (getContext().getLangOpts().CUDAIsDevice) {
// Coerce pointer arguments with default address space to CrossWorkGroup // Coerce pointer arguments with default address space to CrossWorkGroup
// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo // pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the
// maps cuda_device to SPIR-V's CrossWorkGroup address space. // SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address space.
llvm::Type *LTy = CGT.ConvertType(Ty); llvm::Type *LTy = CGT.ConvertType(Ty);
auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default); auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device); auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);

View File

@ -0,0 +1,18 @@
// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
// REQUIRES: clang-driver
// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1
// RUN: llvm-dis %t.bc -o %t.ll
// RUN: FileCheck %s --input-file=%t.ll
// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1
// RUN: llvm-dis %t.bc -o %t.ll
// RUN: FileCheck %s --input-file=%t.ll
// CHECK: define
// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef
__attribute__((global)) void kernel(int* output) { *output = 1; }