From c2f501f39589a59db9cebc839d0a63dcdc3c5c81 Mon Sep 17 00:00:00 2001 From: Shangwu Yao Date: Thu, 24 Feb 2022 20:51:43 -0800 Subject: [PATCH] [CUDA][SPIRV] Assign global address space to CUDA kernel arguments (resubmit https://reviews.llvm.org/D119207 after fixing the test for some build settings) This patch converts CUDA pointer kernel arguments with default address space to CrossWorkGroup address space (__global in OpenCL). This is because Generic or Function (OpenCL's private) is not supported as storage class for kernel pointer types. Differential revision: https://reviews.llvm.org/D120366 --- clang/lib/Basic/Targets/SPIR.h | 10 +++++----- clang/lib/CodeGen/TargetInfo.cpp | 6 +++--- clang/test/CodeGenCUDASPIRV/kernel-argument.cu | 18 ++++++++++++++++++ 3 files changed, 26 insertions(+), 8 deletions(-) create mode 100644 clang/test/CodeGenCUDASPIRV/kernel-argument.cu diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h index a40d4b3ca27e..08c49f018ac7 100644 --- a/clang/lib/Basic/Targets/SPIR.h +++ b/clang/lib/Basic/Targets/SPIR.h @@ -144,16 +144,16 @@ public: // FIXME: SYCL specification considers unannotated pointers and references // to be pointing to the generic address space. See section 5.9.3 of // SYCL 2020 specification. - // Currently, there is no way of representing SYCL's and HIP's default + // Currently, there is no way of representing SYCL's and HIP/CUDA's default // address space language semantic along with the semantics of embedded C's // default address space in the same address space map. Hence the map needs // to be reset to allow mapping to the desired value of 'Default' entry for - // SYCL and HIP. + // SYCL and HIP/CUDA. setAddressSpaceMap( /*DefaultIsGeneric=*/Opts.SYCLIsDevice || - // The address mapping from HIP language for device code is only defined - // for SPIR-V. - (getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice)); + // The address mapping from HIP/CUDA language for device code is only + // defined for SPIR-V. + (getTriple().isSPIRV() && Opts.CUDAIsDevice)); } void setSupportedOpenCLOpts() override { diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index a26a1955bcc5..765250540d38 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -10320,10 +10320,10 @@ void CommonSPIRABIInfo::setCCs() { } ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const { - if (getContext().getLangOpts().HIP) { + if (getContext().getLangOpts().CUDAIsDevice) { // Coerce pointer arguments with default address space to CrossWorkGroup - // pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo - // maps cuda_device to SPIR-V's CrossWorkGroup address space. + // pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the + // SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address space. llvm::Type *LTy = CGT.ConvertType(Ty); auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default); auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device); diff --git a/clang/test/CodeGenCUDASPIRV/kernel-argument.cu b/clang/test/CodeGenCUDASPIRV/kernel-argument.cu new file mode 100644 index 000000000000..c10192f74355 --- /dev/null +++ b/clang/test/CodeGenCUDASPIRV/kernel-argument.cu @@ -0,0 +1,18 @@ +// Tests CUDA kernel arguments get global address space when targetting SPIR-V. + +// REQUIRES: clang-driver + +// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \ +// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1 +// RUN: llvm-dis %t.bc -o %t.ll +// RUN: FileCheck %s --input-file=%t.ll + +// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \ +// RUN: -nocudalib -nocudainc %s -o %t.bc -c 2>&1 +// RUN: llvm-dis %t.bc -o %t.ll +// RUN: FileCheck %s --input-file=%t.ll + +// CHECK: define +// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef + +__attribute__((global)) void kernel(int* output) { *output = 1; }