forked from OSchip/llvm-project
[DAGCombiner] Add general constant vector support to (shl (mul x, c1), c2) -> (mul x, c1 << c2)
We already supported scalar constant / splatted constant vector - now accepts any (non opaque) constant scalar / vector llvm-svn: 284607
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@ -4678,11 +4678,12 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
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}
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// fold (shl (mul x, c1), c2) -> (mul x, c1 << c2)
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if (N1C && N0.getOpcode() == ISD::MUL && N0.getNode()->hasOneUse()) {
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if (ConstantSDNode *N0C1 = isConstOrConstSplat(N0.getOperand(1))) {
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if (SDValue Folded =
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DAG.FoldConstantArithmetic(ISD::SHL, SDLoc(N1), VT, N0C1, N1C))
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return DAG.getNode(ISD::MUL, SDLoc(N), VT, N0.getOperand(0), Folded);
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if (N0.getOpcode() == ISD::MUL && N0.getNode()->hasOneUse()) {
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if (isConstantOrConstantVector(N1, /* No Opaques */ true) &&
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isConstantOrConstantVector(N0.getOperand(1), /* No Opaques */ true)) {
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SDValue Shl = DAG.getNode(ISD::SHL, SDLoc(N1), VT, N0.getOperand(1), N1);
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AddToWorklist(Shl.getNode());
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return DAG.getNode(ISD::MUL, SDLoc(N), VT, N0.getOperand(0), Shl);
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}
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}
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@ -572,7 +572,6 @@ define <4 x i32> @combine_vec_shl_mul1(<4 x i32> %x) {
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; AVX-LABEL: combine_vec_shl_mul1:
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; AVX: # BB#0:
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; AVX-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = mul <4 x i32> %x, <i32 5, i32 6, i32 7, i32 8>
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%2 = shl <4 x i32> %1, <i32 1, i32 2, i32 3, i32 4>
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