forked from OSchip/llvm-project
[VectorCombine] Add multi-use shl test for D80885
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llvm/test/Transforms/VectorCombine/X86
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@ -155,6 +155,21 @@ define <2 x i64> @shl_constant_op0_load(i64* %p) {
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ret <2 x i64> %bo
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}
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define <4 x i32> @shl_constant_op0_multiuse(i32 %a0, <4 x i32> %a1) {
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; CHECK-LABEL: @shl_constant_op0_multiuse(
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; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 [[A0:%.*]], i32 0
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; CHECK-NEXT: [[MUL:%.*]] = shl <4 x i32> [[INS]], <i32 3, i32 4, i32 5, i32 6>
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; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[INS]], [[A1:%.*]]
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; CHECK-NEXT: [[XOR:%.*]] = xor <4 x i32> [[AND]], [[MUL]]
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; CHECK-NEXT: ret <4 x i32> [[XOR]]
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;
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%ins = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 %a0, i32 0
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%mul = shl <4 x i32> %ins, <i32 3, i32 4, i32 5, i32 6>
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%and = and <4 x i32> %ins, %a1
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%xor = xor <4 x i32> %and, %mul
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ret <4 x i32> %xor
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}
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define <2 x i64> @shl_constant_op1(i64 %x) {
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; CHECK-LABEL: @shl_constant_op1(
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; CHECK-NEXT: [[INS:%.*]] = insertelement <2 x i64> undef, i64 [[X:%.*]], i32 0
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