forked from OSchip/llvm-project
CALL node change (arg / sign pairs instead of just arguments).
llvm-svn: 28462
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@ -901,6 +901,7 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0;
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bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0;
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SDOperand Callee = Op.getOperand(4);
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unsigned NumOps = (Op.getNumOperands() - 5) / 2;
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// args_to_use will accumulate outgoing args for the PPCISD::CALL case in
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// SelectExpr to use to put the arguments in the appropriate registers.
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@ -912,8 +913,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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unsigned NumBytes = 24;
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// Add up all the space actually used.
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for (unsigned i = 5, e = Op.getNumOperands(); i != e; ++i)
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NumBytes += MVT::getSizeInBits(Op.getOperand(i).getValueType())/8;
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for (unsigned i = 0; i != NumOps; ++i)
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NumBytes += MVT::getSizeInBits(Op.getOperand(5+2*i).getValueType())/8;
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// If we are calling what looks like a varargs function on the caller side,
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// there are two cases:
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@ -962,8 +963,8 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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std::vector<std::pair<unsigned, SDOperand> > RegsToPass;
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std::vector<SDOperand> MemOpChains;
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for (unsigned i = 5, e = Op.getNumOperands(); i != e; ++i) {
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SDOperand Arg = Op.getOperand(i);
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for (unsigned i = 0; i != NumOps; ++i) {
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SDOperand Arg = Op.getOperand(5+2*i);
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// PtrOff will be used to store the current argument to the stack if a
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// register cannot be found for it.
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