forked from OSchip/llvm-project
ELF: Add support for remaining R_AARCH64_MOVW* relocations.
Differential Revision: https://reviews.llvm.org/D64685 llvm-svn: 366466
This commit is contained in:
Peter Collingbourne
parent
37fed66402
commit
c2ccf4ccba
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@ -101,6 +101,13 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
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case R_AARCH64_PREL64:
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case R_AARCH64_ADR_PREL_LO21:
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case R_AARCH64_LD_PREL_LO19:
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case R_AARCH64_MOVW_PREL_G0:
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case R_AARCH64_MOVW_PREL_G0_NC:
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case R_AARCH64_MOVW_PREL_G1:
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case R_AARCH64_MOVW_PREL_G1_NC:
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case R_AARCH64_MOVW_PREL_G2:
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case R_AARCH64_MOVW_PREL_G2_NC:
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case R_AARCH64_MOVW_PREL_G3:
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return R_PC;
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case R_AARCH64_ADR_PREL_PG_HI21:
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case R_AARCH64_ADR_PREL_PG_HI21_NC:
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@ -247,6 +254,26 @@ static void or32AArch64Imm(uint8_t *l, uint64_t imm) {
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or32le(l, (imm & 0xFFF) << 10);
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}
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// Update the immediate field in an AArch64 movk, movn or movz instruction
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// for a signed relocation, and update the opcode of a movn or movz instruction
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// to match the sign of the operand.
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static void writeSMovWImm(uint8_t *loc, uint32_t imm) {
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uint32_t inst = read32le(loc);
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// Opcode field is bits 30, 29, with 10 = movz, 00 = movn and 11 = movk.
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if (!(inst & (1 << 29))) {
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// movn or movz.
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if (imm & 0x10000) {
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// Change opcode to movn, which takes an inverted operand.
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imm ^= 0xFFFF;
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inst &= ~(1 << 30);
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} else {
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// Change opcode to movz.
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inst |= 1 << 30;
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}
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}
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write32le(loc, inst | ((imm & 0xFFFF) << 5));
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}
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void AArch64::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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switch (type) {
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case R_AARCH64_ABS16:
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@ -326,18 +353,51 @@ void AArch64::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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checkAlignment(loc, val, 16, type);
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or32AArch64Imm(loc, getBits(val, 4, 11));
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break;
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case R_AARCH64_MOVW_UABS_G0:
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checkUInt(loc, val, 16, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_UABS_G0_NC:
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or32le(loc, (val & 0xFFFF) << 5);
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break;
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case R_AARCH64_MOVW_UABS_G1:
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checkUInt(loc, val, 32, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_UABS_G1_NC:
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or32le(loc, (val & 0xFFFF0000) >> 11);
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break;
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case R_AARCH64_MOVW_UABS_G2:
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checkUInt(loc, val, 48, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_UABS_G2_NC:
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or32le(loc, (val & 0xFFFF00000000) >> 27);
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break;
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case R_AARCH64_MOVW_UABS_G3:
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or32le(loc, (val & 0xFFFF000000000000) >> 43);
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break;
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case R_AARCH64_MOVW_PREL_G0:
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case R_AARCH64_MOVW_SABS_G0:
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checkInt(loc, val, 17, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_PREL_G0_NC:
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writeSMovWImm(loc, val);
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break;
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case R_AARCH64_MOVW_PREL_G1:
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case R_AARCH64_MOVW_SABS_G1:
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checkInt(loc, val, 33, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_PREL_G1_NC:
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writeSMovWImm(loc, val >> 16);
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break;
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case R_AARCH64_MOVW_PREL_G2:
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case R_AARCH64_MOVW_SABS_G2:
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checkInt(loc, val, 49, type);
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LLVM_FALLTHROUGH;
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case R_AARCH64_MOVW_PREL_G2_NC:
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writeSMovWImm(loc, val >> 32);
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break;
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case R_AARCH64_MOVW_PREL_G3:
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writeSMovWImm(loc, val >> 48);
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break;
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case R_AARCH64_TSTBR14:
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checkInt(loc, val, 16, type);
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or32le(loc, (val & 0xFFFC) << 3);
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@ -0,0 +1,36 @@
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# REQUIRES: aarch64
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# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t
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# RUN: echo '.globl zero; zero = 0' | llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd -o %t2.o
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# RUN: not ld.lld %t %t2.o -o /dev/null 2>&1 | FileCheck %s
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# CHECK: relocation R_AARCH64_MOVW_UABS_G0 out of range: 65536 is not in [0, 65535]
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movn x0, #:abs_g0:zero+0x10000
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# CHECK: relocation R_AARCH64_MOVW_UABS_G1 out of range: 4294967296 is not in [0, 4294967295]
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movn x0, #:abs_g1:zero+0x100000000
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# CHECK: relocation R_AARCH64_MOVW_UABS_G2 out of range: 281474976710656 is not in [0, 281474976710655]
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movn x0, #:abs_g2:zero+0x1000000000000
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# CHECK: relocation R_AARCH64_MOVW_SABS_G0 out of range: 65536 is not in [-65536, 65535]
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movn x0, #:abs_g0_s:zero+0x10000
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# CHECK: relocation R_AARCH64_MOVW_SABS_G1 out of range: 4294967296 is not in [-4294967296, 4294967295]
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movn x0, #:abs_g1_s:zero+0x100000000
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# CHECK: relocation R_AARCH64_MOVW_SABS_G2 out of range: 281474976710656 is not in [-281474976710656, 281474976710655]
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movn x0, #:abs_g2_s:zero+0x1000000000000
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# CHECK: relocation R_AARCH64_MOVW_SABS_G0 out of range: -65537 is not in [-65536, 65535]
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movn x0, #:abs_g0_s:zero-0x10001
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# CHECK: relocation R_AARCH64_MOVW_SABS_G1 out of range: -4295032832 is not in [-4294967296, 4294967295]
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movn x0, #:abs_g1_s:zero-0x100010000
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# CHECK: relocation R_AARCH64_MOVW_SABS_G2 out of range: -281479271677952 is not in [-281474976710656, 281474976710655]
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movn x0, #:abs_g2_s:zero-0x1000100000000
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# CHECK: relocation R_AARCH64_MOVW_PREL_G0 out of range: 65536 is not in [-65536, 65535]
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movn x0, #:prel_g0:.+0x10000
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# CHECK: relocation R_AARCH64_MOVW_PREL_G1 out of range: 4294967296 is not in [-4294967296, 4294967295]
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movn x0, #:prel_g1:.+0x100000000
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# CHECK: relocation R_AARCH64_MOVW_PREL_G2 out of range: 281474976710656 is not in [-281474976710656, 281474976710655]
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movn x0, #:prel_g2:.+0x1000000000000
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# CHECK: relocation R_AARCH64_MOVW_PREL_G0 out of range: -65537 is not in [-65536, 65535]
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movn x0, #:prel_g0:.-0x10001
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# CHECK: relocation R_AARCH64_MOVW_PREL_G1 out of range: -4295032832 is not in [-4294967296, 4294967295]
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movn x0, #:prel_g1:.-0x100010000
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# CHECK: relocation R_AARCH64_MOVW_PREL_G2 out of range: -281479271677952 is not in [-281474976710656, 281474976710655]
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movn x0, #:prel_g2:.-0x1000100000000
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@ -169,8 +169,11 @@ foo16:
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.section .R_AARCH64_MOVW_UABS,"ax",@progbits
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movz1:
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movk x12, #:abs_g0:zero+0xC
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movk x12, #:abs_g0_nc:zero+0xF000E000D000C
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movk x13, #:abs_g1:zero+0xD000C
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movk x13, #:abs_g1_nc:zero+0xF000E000D000C
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movk x14, #:abs_g2:zero+0xE000D000C
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movk x14, #:abs_g2_nc:zero+0xF000E000D000C
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movz x15, #:abs_g3:zero+0xF000E000D000C
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movk x16, #:abs_g3:zero+0xF000E000D000C
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@ -180,7 +183,75 @@ movz1:
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# CHECK-EMPTY:
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# CHECK-NEXT: movz1:
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# CHECK-NEXT: 8c 01 80 f2 movk x12, #12
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# CHECK-NEXT: 8c 01 80 f2 movk x12, #12
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# CHECK-NEXT: ad 01 a0 f2 movk x13, #13, lsl #16
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# CHECK-NEXT: ad 01 a0 f2 movk x13, #13, lsl #16
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# CHECK-NEXT: ce 01 c0 f2 movk x14, #14, lsl #32
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# CHECK-NEXT: ce 01 c0 f2 movk x14, #14, lsl #32
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# CHECK-NEXT: ef 01 e0 d2 mov x15, #4222124650659840
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# CHECK-NEXT: f0 01 e0 f2 movk x16, #15, lsl #48
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.section .R_AARCH64_MOVW_SABS,"ax",@progbits
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movz x1, #:abs_g0_s:zero+1
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movz x1, #:abs_g0_s:zero-1
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movz x2, #:abs_g1_s:zero+0x20000
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movz x2, #:abs_g1_s:zero-0x20000
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movz x3, #:abs_g2_s:zero+0x300000000
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movz x3, #:abs_g2_s:zero-0x300000000
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# CHECK: Disassembly of section .R_AARCH64_MOVW_SABS:
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# CHECK-EMPTY:
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# CHECK-NEXT: :
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# CHECK-NEXT: 21 00 80 d2 mov x1, #1
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# CHECK-NEXT: 01 00 80 92 mov x1, #-1
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# CHECK-NEXT: 42 00 a0 d2 mov x2, #131072
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## -65537 = 0xfffffffffffeffff
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# CHECK-NEXT: 22 00 a0 92 mov x2, #-65537
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## 12884901888 = 0x300000000
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# CHECK-NEXT: 63 00 c0 d2 mov x3, #12884901888
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## -8589934593 = #0xfffffffdffffffff
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# CHECK-NEXT: 43 00 c0 92 mov x3, #-8589934593
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.section .R_AARCH64_MOVW_PREL,"ax",@progbits
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movz x1, #:prel_g0:.+1
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movz x1, #:prel_g0_nc:.-1
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movk x1, #:prel_g0:.+1
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movk x1, #:prel_g0_nc:.-1
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movz x2, #:prel_g1:.+0x20000
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movz x2, #:prel_g1_nc:.-0x20000
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movk x2, #:prel_g1:.+0x20000
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movk x2, #:prel_g1_nc:.-0x20000
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movz x3, #:prel_g2:.+0x300000000
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movz x3, #:prel_g2_nc:.-0x300000000
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movk x3, #:prel_g2:.+0x300000000
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movk x3, #:prel_g2_nc:.-0x300000000
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movz x3, #:prel_g2:.+0x300000000
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movz x4, #:prel_g3:.+0x4000000000000
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movz x4, #:prel_g3:.-0x4000000000000
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movk x4, #:prel_g3:.+0x4000000000000
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movk x4, #:prel_g3:.-0x4000000000000
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# CHECK: Disassembly of section .R_AARCH64_MOVW_PREL:
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# CHECK-EMPTY:
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# CHECK-NEXT: :
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# CHECK-NEXT: 21009c: 21 00 80 d2 mov x1, #1
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# CHECK-NEXT: 2100a0: 01 00 80 92 mov x1, #-1
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# CHECK-NEXT: 2100a4: 21 00 80 f2 movk x1, #1
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# CHECK-NEXT: 2100a8: e1 ff 9f f2 movk x1, #65535
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# CHECK-NEXT: 2100ac: 42 00 a0 d2 mov x2, #131072
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## -65537 = 0xfffffffffffeffff
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# CHECK-NEXT: 2100b0: 22 00 a0 92 mov x2, #-65537
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# CHECK-NEXT: 2100b4: 42 00 a0 f2 movk x2, #2, lsl #16
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# CHECK-NEXT: 2100b8: c2 ff bf f2 movk x2, #65534, lsl #16
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## 12884901888 = 0x300000000
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# CHECK-NEXT: 2100bc: 63 00 c0 d2 mov x3, #12884901888
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## -8589934593 = #0xfffffffdffffffff
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# CHECK-NEXT: 2100c0: 43 00 c0 92 mov x3, #-8589934593
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# CHECK-NEXT: 2100c4: 63 00 c0 f2 movk x3, #3, lsl #32
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# CHECK-NEXT: 2100c8: a3 ff df f2 movk x3, #65533, lsl #32
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# CHECK-NEXT: 2100cc: 63 00 c0 d2 mov x3, #12884901888
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## 1125899906842624 = 0x4000000000000
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# CHECK-NEXT: 2100d0: 84 00 e0 d2 mov x4, #1125899906842624
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# CHECK-NEXT: 2100d4: 84 ff ff d2 mov x4, #-1125899906842624
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# CHECK-NEXT: 2100d8: 84 00 e0 f2 movk x4, #4, lsl #48
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# CHECK-NEXT: 2100dc: 84 ff ff f2 movk x4, #65532, lsl #48
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