MIR: Support MachineMemOperands without associated value

This is allowed (though used rarely) and useful to keep your tests
short.

llvm-svn: 271752

llvm/lib/CodeGen/MIRParser/MIParser.cpp

@@ -1778,14 +1778,16 @@ bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
     return true;
   lex();
 
-  const char *Word = Flags & MachineMemOperand::MOLoad ? "from" : "into";
-  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != Word)
-    return error(Twine("expected '") + Word + "'");
-  lex();
-
   MachinePointerInfo Ptr = MachinePointerInfo();
-  if (parseMachinePointerInfo(Ptr))
-    return true;
+  if (Token.is(MIToken::Identifier)) {
+    const char *Word = Flags & MachineMemOperand::MOLoad ? "from" : "into";
+    if (Token.stringValue() != Word)
+      return error(Twine("expected '") + Word + "'");
+    lex();
+
+    if (parseMachinePointerInfo(Ptr))
+      return true;
+  }
   unsigned BaseAlignment = Size;
   AAMDNodes AAInfo;
   MDNode *Range = nullptr;

llvm/lib/CodeGen/MIRPrinter.cpp

@@ -883,11 +883,12 @@ void MIPrinter::print(const MachineMemOperand &Op) {
     assert(Op.isStore() && "Non load machine operand must be a store");
     OS << "store ";
   }
-  OS << Op.getSize() << (Op.isLoad() ? " from " : " into ");
+  OS << Op.getSize();
   if (const Value *Val = Op.getValue()) {
+    OS << (Op.isLoad() ? " from " : " into ");
     printIRValueReference(*Val);
-  } else {
-    const PseudoSourceValue *PVal = Op.getPseudoValue();
+  } else if (const PseudoSourceValue *PVal = Op.getPseudoValue()) {
+    OS << (Op.isLoad() ? " from " : " into ");
     assert(PVal && "Expected a pseudo source value");
     switch (PVal->kind()) {
     case PseudoSourceValue::Stack:

llvm/test/CodeGen/MIR/X86/expected-from-in-memory-operand.mir

@@ -1,24 +0,0 @@
-# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
-
---- |
-
-  define i32 @test(i32* %a) {
-  entry:
-    %b = load i32, i32* %a
-    ret i32 %b
-  }
-
-...
----
-name:            test
-tracksRegLiveness: true
-liveins:
-  - { reg: '%rdi' }
-body: |
-  bb.0.entry:
-    liveins: %rdi
-  ; CHECK: [[@LINE+1]]:55: expected 'from'
-    %eax = MOV32rm killed %rdi, 1, _, 0, _ :: (load 4 %ir.a)
-    RETQ %eax
-...
-

llvm/test/CodeGen/MIR/X86/memory-operands.mir

@@ -186,6 +186,10 @@
     %0 = load i8*, i8** undef, align 8
     ret i8* %0
   }
+
+  define void @dummy() {
+    ret void
+  }
 ...
 ---
 name:            test
@@ -506,3 +510,14 @@ body: |
     %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8 from `i8** undef`)
     RETQ %rax
 ...
+---
+# Test memory operand without associated value.
+# CHECK-LABEL: name: dummy
+# CHECK: %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8)
+name: dummy
+tracksRegLiveness: true
+body: |
+  bb.0:
+    %rax = MOV64rm undef %rax, 1, _, 0, _ :: (load 8)
+    RETQ %rax
+...