forked from OSchip/llvm-project
Revert the debugserver part of r211868. While formally a fine change, debugserver
doesn't depend on llvm (it really doesn't even depend on anything in lldb) and this nicety isn't worth adding that dependence. llvm-svn: 211903
This commit is contained in:
parent
b673b4b187
commit
c1fdb889a9
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@ -47,7 +47,6 @@
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#include "DNBTimer.h"
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#include "CFBundle.h"
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#include "llvm/ADT/STLExtras.h"
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typedef std::shared_ptr<MachProcess> MachProcessSP;
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typedef std::map<nub_process_t, MachProcessSP> ProcessMap;
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@ -543,7 +542,7 @@ GetAllInfos (std::vector<struct kinfo_proc>& proc_infos)
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{
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size_t size = 0;
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int name[] = { CTL_KERN, KERN_PROC, KERN_PROC_ALL };
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u_int namelen = llvm::array_lengthof(name);
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u_int namelen = sizeof(name)/sizeof(int);
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int err;
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// Try to find out how many processes are around so we can
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@ -20,8 +20,6 @@
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#include "DNBThreadResumeActions.h"
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#include "MachProcess.h"
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#include "llvm/ADT/STLExtras.h"
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MachThreadList::MachThreadList() :
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m_threads(),
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m_threads_mutex(PTHREAD_MUTEX_RECURSIVE),
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@ -315,7 +313,7 @@ MachThreadList::UpdateThreadList(MachProcess *process, bool update, MachThreadLi
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int mib[4] = { CTL_KERN, KERN_PROC, KERN_PROC_PID, process->ProcessID() };
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struct kinfo_proc processInfo;
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size_t bufsize = sizeof(processInfo);
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if (sysctl(mib, llvm::array_lengthof(mib), &processInfo, &bufsize, NULL, 0) == 0 && bufsize > 0)
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if (sysctl(mib, (unsigned)(sizeof(mib)/sizeof(int)), &processInfo, &bufsize, NULL, 0) == 0 && bufsize > 0)
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{
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if (processInfo.kp_proc.p_flag & P_LP64)
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m_is_64_bit = true;
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@ -23,8 +23,6 @@
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#include "ARM_GCC_Registers.h"
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#include "ARM_DWARF_Registers.h"
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#include "llvm/ADT/STLExtras.h"
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#include <inttypes.h>
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#include <sys/sysctl.h>
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@ -1557,9 +1555,9 @@ DNBArchMachARM::g_exc_registers[] =
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};
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// Number of registers in each register set
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const size_t DNBArchMachARM::k_num_gpr_registers = llvm::array_lengthof(g_gpr_registers);
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const size_t DNBArchMachARM::k_num_vfp_registers = llvm::array_lengthof(g_vfp_registers);
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const size_t DNBArchMachARM::k_num_exc_registers = llvm::array_lengthof(g_exc_registers);
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const size_t DNBArchMachARM::k_num_gpr_registers = sizeof(g_gpr_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchMachARM::k_num_vfp_registers = sizeof(g_vfp_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchMachARM::k_num_exc_registers = sizeof(g_exc_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchMachARM::k_num_all_registers = k_num_gpr_registers + k_num_vfp_registers + k_num_exc_registers;
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//----------------------------------------------------------------------
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@ -1576,7 +1574,7 @@ DNBArchMachARM::g_reg_sets[] =
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{ "Exception State Registers", g_exc_registers, k_num_exc_registers }
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};
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// Total number of register sets for this architecture
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const size_t DNBArchMachARM::k_num_register_sets = llvm::array_lengthof(g_reg_sets);
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const size_t DNBArchMachARM::k_num_register_sets = sizeof(g_reg_sets)/sizeof(DNBRegisterSetInfo);
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const DNBRegisterSetInfo *
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@ -24,8 +24,6 @@
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#include "DNBRegisterInfo.h"
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#include "DNB.h"
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#include "llvm/ADT/STLExtras.h"
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#include <inttypes.h>
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#include <sys/sysctl.h>
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@ -1646,9 +1644,9 @@ DNBArchMachARM64::g_exc_registers[] =
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};
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// Number of registers in each register set
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const size_t DNBArchMachARM64::k_num_gpr_registers = llvm::array_lengthof(g_gpr_registers);
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const size_t DNBArchMachARM64::k_num_vfp_registers = llvm::array_lengthof(g_vfp_registers);
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const size_t DNBArchMachARM64::k_num_exc_registers = llvm::array_lengthof(g_exc_registers);
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const size_t DNBArchMachARM64::k_num_gpr_registers = sizeof(g_gpr_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchMachARM64::k_num_vfp_registers = sizeof(g_vfp_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchMachARM64::k_num_exc_registers = sizeof(g_exc_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchMachARM64::k_num_all_registers = k_num_gpr_registers + k_num_vfp_registers + k_num_exc_registers;
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//----------------------------------------------------------------------
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@ -1665,7 +1663,7 @@ DNBArchMachARM64::g_reg_sets[] =
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{ "Exception State Registers", g_exc_registers, k_num_exc_registers }
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};
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// Total number of register sets for this architecture
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const size_t DNBArchMachARM64::k_num_register_sets = llvm::array_lengthof(g_reg_sets);
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const size_t DNBArchMachARM64::k_num_register_sets = sizeof(g_reg_sets)/sizeof(DNBRegisterSetInfo);
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const DNBRegisterSetInfo *
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@ -20,8 +20,6 @@
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#include "MachThread.h"
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#include "MachProcess.h"
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#include "llvm/ADT/STLExtras.h"
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extern "C" bool CPUHasAVX(); // Defined over in DNBArchImplX86_64.cpp
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#if defined (LLDB_DEBUGSERVER_RELEASE) || defined (LLDB_DEBUGSERVER_DEBUG)
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@ -1203,10 +1201,10 @@ DNBArchImplI386::g_exc_registers[] =
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};
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// Number of registers in each register set
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const size_t DNBArchImplI386::k_num_gpr_registers = llvm::array_lengthof(g_gpr_registers);
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const size_t DNBArchImplI386::k_num_fpu_registers_no_avx = llvm::array_lengthof(g_fpu_registers_no_avx);
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const size_t DNBArchImplI386::k_num_fpu_registers_avx = llvm::array_lengthof(g_fpu_registers_avx);
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const size_t DNBArchImplI386::k_num_exc_registers = llvm::array_lengthof(g_exc_registers);
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const size_t DNBArchImplI386::k_num_gpr_registers = sizeof(g_gpr_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchImplI386::k_num_fpu_registers_no_avx = sizeof(g_fpu_registers_no_avx)/sizeof(DNBRegisterInfo);
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const size_t DNBArchImplI386::k_num_fpu_registers_avx = sizeof(g_fpu_registers_avx)/sizeof(DNBRegisterInfo);
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const size_t DNBArchImplI386::k_num_exc_registers = sizeof(g_exc_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchImplI386::k_num_all_registers_no_avx = k_num_gpr_registers + k_num_fpu_registers_no_avx + k_num_exc_registers;
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const size_t DNBArchImplI386::k_num_all_registers_avx = k_num_gpr_registers + k_num_fpu_registers_avx + k_num_exc_registers;
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@ -1234,7 +1232,7 @@ DNBArchImplI386::g_reg_sets_avx[] =
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};
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// Total number of register sets for this architecture
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const size_t DNBArchImplI386::k_num_register_sets = llvm::array_lengthof(g_reg_sets_no_avx);
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const size_t DNBArchImplI386::k_num_register_sets = sizeof(g_reg_sets_no_avx)/sizeof(DNBRegisterSetInfo);
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DNBArchProtocol *
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DNBArchImplI386::Create (MachThread *thread)
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@ -25,8 +25,6 @@
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#include "DNBLog.h"
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#include "DNBRegisterInfo.h"
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#include "llvm/ADT/STLExtras.h"
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static const uint8_t g_breakpoint_opcode[] = { 0x7F, 0xC0, 0x00, 0x08 };
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const uint8_t * const
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};
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// Number of registers in each register set
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const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_registers);
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const size_t k_num_fpr_registers = llvm::array_lengthof(g_fpr_registers);
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const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_registers);
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const size_t k_num_vec_registers = llvm::array_lengthof(g_vec_registers);
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const size_t k_num_gpr_registers = sizeof(g_gpr_registers)/sizeof(DNBRegisterInfo);
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const size_t k_num_fpr_registers = sizeof(g_fpr_registers)/sizeof(DNBRegisterInfo);
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const size_t k_num_exc_registers = sizeof(g_exc_registers)/sizeof(DNBRegisterInfo);
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const size_t k_num_vec_registers = sizeof(g_vec_registers)/sizeof(DNBRegisterInfo);
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// Total number of registers for this architecture
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const size_t k_num_ppc_registers = k_num_gpr_registers + k_num_fpr_registers + k_num_exc_registers + k_num_vec_registers;
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{ "Altivec Registers", g_vec_registers, k_num_vec_registers }
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};
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// Total number of register sets for this architecture
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const size_t k_num_register_sets = llvm::array_lengthof(g_reg_sets);
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const size_t k_num_register_sets = sizeof(g_reg_sets)/sizeof(DNBRegisterSetInfo);
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const DNBRegisterSetInfo *
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@ -13,8 +13,6 @@
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#if defined (__i386__) || defined (__x86_64__)
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#include "llvm/ADT/STLExtras.h"
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <sys/sysctl.h>
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};
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// Number of registers in each register set
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const size_t DNBArchImplX86_64::k_num_gpr_registers = llvm::array_lengthof(g_gpr_registers);
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const size_t DNBArchImplX86_64::k_num_fpu_registers_no_avx = llvm::array_lengthof(g_fpu_registers_no_avx);
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const size_t DNBArchImplX86_64::k_num_fpu_registers_avx = llvm::array_lengthof(g_fpu_registers_avx);
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const size_t DNBArchImplX86_64::k_num_exc_registers = llvm::array_lengthof(g_exc_registers);
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const size_t DNBArchImplX86_64::k_num_gpr_registers = sizeof(g_gpr_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchImplX86_64::k_num_fpu_registers_no_avx = sizeof(g_fpu_registers_no_avx)/sizeof(DNBRegisterInfo);
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const size_t DNBArchImplX86_64::k_num_fpu_registers_avx = sizeof(g_fpu_registers_avx)/sizeof(DNBRegisterInfo);
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const size_t DNBArchImplX86_64::k_num_exc_registers = sizeof(g_exc_registers)/sizeof(DNBRegisterInfo);
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const size_t DNBArchImplX86_64::k_num_all_registers_no_avx = k_num_gpr_registers + k_num_fpu_registers_no_avx + k_num_exc_registers;
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const size_t DNBArchImplX86_64::k_num_all_registers_avx = k_num_gpr_registers + k_num_fpu_registers_avx + k_num_exc_registers;
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};
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// Total number of register sets for this architecture
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const size_t DNBArchImplX86_64::k_num_register_sets = llvm::array_lengthof(g_reg_sets_avx);
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const size_t DNBArchImplX86_64::k_num_register_sets = sizeof(g_reg_sets_avx)/sizeof(DNBRegisterSetInfo);
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DNBArchProtocol *
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@ -17,8 +17,6 @@
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#include <termios.h>
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#include <stdint.h>
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#include "llvm/ADT/STLExtras.h"
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class TTYState
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{
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public:
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bool GetState(uint32_t idx, int fd, bool saveProcessGroup);
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bool SetState(uint32_t idx) const;
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uint32_t NumStates() const { return llvm::array_lengthof(m_ttystates); }
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uint32_t NumStates() const { return sizeof(m_ttystates)/sizeof(TTYState); }
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bool ValidStateIndex(uint32_t idx) const { return idx < NumStates(); }
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protected:
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TTYState m_ttystates[2];
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};
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#endif
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#endif
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