forked from OSchip/llvm-project
[AMDGPU] add test for usubsat; NFC
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c1ca9e3077
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@ -73,6 +73,46 @@ define i16 @v_usubsat_i16(i16 %lhs, i16 %rhs) {
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ret i16 %result
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}
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define i16 @usubsat_as_bithack_i16(i16 %x) {
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; GFX6-LABEL: usubsat_as_bithack_i16:
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; GFX6: ; %bb.0:
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; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX6-NEXT: v_bfe_i32 v1, v0, 0, 16
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; GFX6-NEXT: v_ashrrev_i32_e32 v1, 15, v1
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; GFX6-NEXT: v_xor_b32_e32 v0, 0xffff8000, v0
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; GFX6-NEXT: v_and_b32_e32 v0, v1, v0
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; GFX6-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX8-LABEL: usubsat_as_bithack_i16:
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; GFX8: ; %bb.0:
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; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX8-NEXT: v_ashrrev_i16_e32 v1, 15, v0
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; GFX8-NEXT: v_xor_b32_e32 v0, 0xffff8000, v0
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; GFX8-NEXT: v_and_b32_e32 v0, v1, v0
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; GFX8-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: usubsat_as_bithack_i16:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_ashrrev_i16_e32 v1, 15, v0
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; GFX9-NEXT: v_xor_b32_e32 v0, 0xffff8000, v0
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; GFX9-NEXT: v_and_b32_e32 v0, v1, v0
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX10-LABEL: usubsat_as_bithack_i16:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
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; GFX10-NEXT: v_ashrrev_i16 v1, 15, v0
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; GFX10-NEXT: v_xor_b32_e32 v0, 0xffff8000, v0
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; GFX10-NEXT: v_and_b32_e32 v0, v1, v0
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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%signsplat = ashr i16 %x, 15
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%flipsign = xor i16 %x, 32768
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%result = and i16 %signsplat, %flipsign
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ret i16 %result
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}
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define i32 @v_usubsat_i32(i32 %lhs, i32 %rhs) {
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; GFX6-LABEL: v_usubsat_i32:
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; GFX6: ; %bb.0:
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