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[ARM] Change a couple of instances of LiveRegs.contains to !LiveRegs.available 

This changes a couple of calls to LiveRegs.contains to
!LiveRegs.available, one in Thumb1FrameLoweringInfo (which modifies a
test to look more correct to me, given r7 should be the frame pointer so
is not available), and another in the ARMLoadStoreOptimizer, that I
don't have a test for, it was just found by inspection.

Differential Revision: https://reviews.llvm.org/D107454
This commit is contained in:
David Green 2021-08-10 09:53:26 +01:00
parent 53eb469195
commit c140ff493e
3 changed files with 15 additions and 11 deletions
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2
llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
View File

@ -587,7 +587,7 @@ unsigned ARMLoadStoreOpt::findFreeReg(const TargetRegisterClass &RegClass) {
}
for (unsigned Reg : RegClassInfo.getOrder(&RegClass))
if (!LiveRegs.contains(Reg))
if (LiveRegs.available(MF->getRegInfo(), Reg))
return Reg;
return 0;
}

10
llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
View File

@ -582,10 +582,10 @@ bool Thumb1FrameLowering::needPopSpecialFixUp(const MachineFunction &MF) const {
static void findTemporariesForLR(const BitVector &GPRsNoLRSP,
const BitVector &PopFriendly,
const LivePhysRegs &UsedRegs, unsigned &PopReg,
unsigned &TmpReg) {
unsigned &TmpReg, MachineRegisterInfo &MRI) {
PopReg = TmpReg = 0;
for (auto Reg : GPRsNoLRSP.set_bits()) {
if (!UsedRegs.contains(Reg)) {
if (UsedRegs.available(MRI, Reg)) {
// Remember the first pop-friendly register and exit.
if (PopFriendly.test(Reg)) {
PopReg = Reg;
@ -693,7 +693,8 @@ bool Thumb1FrameLowering::emitPopSpecialFixUp(MachineBasicBlock &MBB,
GPRsNoLRSP.reset(ARM::LR);
GPRsNoLRSP.reset(ARM::SP);
GPRsNoLRSP.reset(ARM::PC);
findTemporariesForLR(GPRsNoLRSP, PopFriendly, UsedRegs, PopReg, TemporaryReg);
findTemporariesForLR(GPRsNoLRSP, PopFriendly, UsedRegs, PopReg, TemporaryReg,
MF.getRegInfo());
// If we couldn't find a pop-friendly register, try restoring LR before
// popping the other callee-saved registers, so we could use one of them as a
@ -704,7 +705,8 @@ bool Thumb1FrameLowering::emitPopSpecialFixUp(MachineBasicBlock &MBB,
PrevMBBI--;
if (PrevMBBI->getOpcode() == ARM::tPOP) {
UsedRegs.stepBackward(*PrevMBBI);
findTemporariesForLR(GPRsNoLRSP, PopFriendly, UsedRegs, PopReg, TemporaryReg);
findTemporariesForLR(GPRsNoLRSP, PopFriendly, UsedRegs, PopReg,
TemporaryReg, MF.getRegInfo());
if (PopReg) {
MBBI = PrevMBBI;
UseLDRSP = true;

14
llvm/test/CodeGen/Thumb/PR35481.ll
View File

@ -18,10 +18,11 @@ define <4 x i32> @f() local_unnamed_addr #0 {
; CHECK-V4T-NEXT: movs r2, #3
; CHECK-V4T-NEXT: movs r3, #4
; CHECK-V4T-NEXT: bl g
; CHECK-V4T-NEXT: ldr r7, [sp, #4]
; CHECK-V4T-NEXT: mov lr, r7
; CHECK-V4T-NEXT: pop {r7}
; CHECK-V4T-NEXT: add sp, #4
; CHECK-V4T-NEXT: mov r12, r0
; CHECK-V4T-NEXT: pop {r0}
; CHECK-V4T-NEXT: mov lr, r0
; CHECK-V4T-NEXT: mov r0, r12
; CHECK-V4T-NEXT: bx lr
;
; CHECK-V8M-LABEL: f:
@ -35,10 +36,11 @@ define <4 x i32> @f() local_unnamed_addr #0 {
; CHECK-V8M-NEXT: movs r1, #2
; CHECK-V8M-NEXT: movs r2, #3
; CHECK-V8M-NEXT: movs r3, #4
; CHECK-V8M-NEXT: ldr r7, [sp, #4]
; CHECK-V8M-NEXT: mov lr, r7
; CHECK-V8M-NEXT: pop {r7}
; CHECK-V8M-NEXT: add sp, #4
; CHECK-V8M-NEXT: mov r12, r0
; CHECK-V8M-NEXT: pop {r0}
; CHECK-V8M-NEXT: mov lr, r0
; CHECK-V8M-NEXT: mov r0, r12
; CHECK-V8M-NEXT: b g
entry:
%call = tail call i32 @h(i32 1)