maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[InstCombine] add vector test with undef elts; NFC 

llvm-svn: 330547
This commit is contained in:
Sanjay Patel 2018-04-22 15:59:14 +00:00
parent ef8d3ae4b5
commit c1265ab99e
1 changed files with 13 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
llvm/test/Transforms/InstCombine/logical-select.ll
View File

@ -479,6 +479,19 @@ define <4 x i32> @vec_not_sel_consts(<4 x i32> %a, <4 x i32> %b) {
ret <4 x i32> %or
}
define <4 x i32> @vec_not_sel_consts_undef_elts(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @vec_not_sel_consts_undef_elts(
; CHECK-NEXT: [[AND1:%.*]] = and <4 x i32> [[A:%.*]], <i32 -1, i32 undef, i32 0, i32 0>
; CHECK-NEXT: [[AND2:%.*]] = and <4 x i32> [[B:%.*]], <i32 0, i32 -1, i32 0, i32 undef>
; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[AND1]], [[AND2]]
; CHECK-NEXT: ret <4 x i32> [[OR]]
;
%and1 = and <4 x i32> %a, <i32 -1, i32 undef, i32 0, i32 0>
%and2 = and <4 x i32> %b, <i32 0, i32 -1, i32 0, i32 undef>
%or = or <4 x i32> %and1, %and2
ret <4 x i32> %or
}
; The inverted constants may be operands of xor instructions.
define <4 x i32> @vec_sel_xor(<4 x i32> %a, <4 x i32> %b, <4 x i1> %c) {