forked from OSchip/llvm-project
Matt Arsenault
parent
af6fbbf18b
commit
c0ea221068
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@ -91,7 +91,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
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setAction({G_CONSTANT, S1}, Legal);
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getActionDefinitionsBuilder(
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{ G_FADD, G_FMUL, G_FNEG, G_FABS})
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{ G_FADD, G_FMUL, G_FNEG, G_FABS, G_FMA})
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.legalFor({S32, S64});
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// Use actual fsub instruction
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@ -357,6 +357,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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case AMDGPU::G_FPTOSI:
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case AMDGPU::G_FPTOUI:
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case AMDGPU::G_FMUL:
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case AMDGPU::G_FMA:
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return getDefaultMappingVOP(MI);
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case AMDGPU::G_IMPLICIT_DEF: {
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unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
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@ -0,0 +1,35 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: test_fma_f32
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-LABEL: name: test_fma
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[FMA:%[0-9]+]]:_(s32) = G_FMA [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s32) = COPY $vgpr2
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%3:_(s32) = G_FMA %0, %1, %2
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$vgpr0 = COPY %3
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...
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---
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name: test_fma_f64
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-LABEL: name: test_fma
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3
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; CHECK: [[FMA:%[0-9]+]]:_(s64) = G_FMA [[COPY]], [[COPY1]]
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%0:_(s64) = COPY $vgpr0_vgpr1
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%1:_(s64) = COPY $vgpr2_vgpr3
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%2:_(s64) = COPY $vgpr4_vgpr5
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%3:_(s64) = G_FMA %0, %1, %2
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$vgpr0_vgpr1 = COPY %3
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...
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@ -0,0 +1,148 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
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---
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name: fma_sss
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1, $sgpr2
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; CHECK-LABEL: name: fma_sss
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)
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; CHECK: [[FMA:%[0-9]+]]:vgpr(s32) = G_FMA [[COPY]], [[COPY3]], [[COPY4]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = COPY $sgpr2
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%3:_(s32) = G_FMA %0, %1, %2
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...
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---
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name: fma_vss
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0, $sgpr1
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; CHECK-LABEL: name: fma_vss
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)
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; CHECK: [[FMA:%[0-9]+]]:vgpr(s32) = G_FMA [[COPY]], [[COPY3]], [[COPY4]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $sgpr0
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%2:_(s32) = COPY $sgpr1
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%3:_(s32) = G_FMA %0, %1, %2
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...
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---
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name: fma_svs
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $sgpr1
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; CHECK-LABEL: name: fma_svs
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)
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; CHECK: [[FMA:%[0-9]+]]:vgpr(s32) = G_FMA [[COPY]], [[COPY1]], [[COPY3]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $vgpr0
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%2:_(s32) = COPY $sgpr1
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%3:_(s32) = G_FMA %0, %1, %2
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...
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---
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name: fma_ssv
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1, $vgpr0
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; CHECK-LABEL: name: fma_ssv
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[FMA:%[0-9]+]]:vgpr(s32) = G_FMA [[COPY]], [[COPY3]], [[COPY2]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = COPY $vgpr0
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%3:_(s32) = G_FMA %0, %1, %2
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...
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---
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name: fma_vvs
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $sgpr0
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; CHECK-LABEL: name: fma_vvs
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)
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; CHECK: [[FMA:%[0-9]+]]:vgpr(s32) = G_FMA [[COPY]], [[COPY1]], [[COPY3]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s32) = COPY $sgpr0
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%3:_(s32) = G_FMA %0, %1, %2
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...
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---
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name: fma_vsv
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0, $vgpr1
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; CHECK-LABEL: name: fma_vsv
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[FMA:%[0-9]+]]:vgpr(s32) = G_FMA [[COPY]], [[COPY3]], [[COPY2]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = COPY $vgpr1
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%3:_(s32) = G_FMA %0, %1, %2
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...
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---
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name: fma_svv
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $vgpr1
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; CHECK-LABEL: name: fma_svv
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; CHECK: [[FMA:%[0-9]+]]:vgpr(s32) = G_FMA [[COPY]], [[COPY1]], [[COPY2]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $vgpr0
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%2:_(s32) = COPY $vgpr1
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%3:_(s32) = G_FMA %0, %1, %2
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...
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---
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name: fma_vvv
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-LABEL: name: fma_vvv
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
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; CHECK: [[FMA:%[0-9]+]]:vgpr(s32) = G_FMA [[COPY]], [[COPY1]], [[COPY2]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s32) = COPY $vgpr2
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%3:_(s32) = G_FMA %0, %1, %2
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...
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