forked from OSchip/llvm-project
[TargetLowering] SimplifyDemandedVectorElts - pass demanded elts through TRUNCATE ops
llvm-svn: 326043
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@ -1536,6 +1536,11 @@ bool TargetLowering::SimplifyDemandedVectorElts(
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}
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}
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break;
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break;
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}
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}
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case ISD::TRUNCATE:
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if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, KnownUndef,
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KnownZero, TLO, Depth + 1))
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return true;
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break;
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default: {
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default: {
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if (Op.getOpcode() >= ISD::BUILTIN_OP_END)
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if (Op.getOpcode() >= ISD::BUILTIN_OP_END)
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if (SimplifyDemandedVectorEltsForTargetNode(Op, DemandedElts, KnownUndef,
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if (SimplifyDemandedVectorEltsForTargetNode(Op, DemandedElts, KnownUndef,
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@ -1869,28 +1869,11 @@ entry:
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}
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}
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define <8 x i16> @PR32160(<8 x i32> %x) {
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define <8 x i16> @PR32160(<8 x i32> %x) {
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; SSE2-LABEL: PR32160:
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; SSE-LABEL: PR32160:
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; SSE2: # %bb.0:
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; SSE: # %bb.0:
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; SSE2-NEXT: pslld $16, %xmm1
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; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,6,7]
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; SSE2-NEXT: psrad $16, %xmm1
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
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; SSE2-NEXT: pslld $16, %xmm0
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; SSE-NEXT: retq
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; SSE2-NEXT: psrad $16, %xmm0
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; SSE2-NEXT: packssdw %xmm1, %xmm0
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; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,2,2,3,4,5,6,7]
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; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: PR32160:
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; SSSE3: # %bb.0:
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; SSSE3-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,6,7]
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; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: PR32160:
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; SSE41: # %bb.0:
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; SSE41-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,6,7]
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; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
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; SSE41-NEXT: retq
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;
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;
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; AVX1-LABEL: PR32160:
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; AVX1-LABEL: PR32160:
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; AVX1: # %bb.0:
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; AVX1: # %bb.0:
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