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[TargetLowering] SimplifyDemandedVectorElts - pass demanded elts through TRUNCATE ops 

llvm-svn: 326043
This commit is contained in:
Simon Pilgrim 2018-02-24 19:28:34 +00:00
parent a6f8100788
commit c0dbdb86c3
2 changed files with 10 additions and 22 deletions
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5
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -1536,6 +1536,11 @@ bool TargetLowering::SimplifyDemandedVectorElts(
}
break;
}
case ISD::TRUNCATE:
if (SimplifyDemandedVectorElts(Op.getOperand(0), DemandedElts, KnownUndef,
KnownZero, TLO, Depth + 1))
return true;
break;
default: {
if (Op.getOpcode() >= ISD::BUILTIN_OP_END)
if (SimplifyDemandedVectorEltsForTargetNode(Op, DemandedElts, KnownUndef,

27
llvm/test/CodeGen/X86/vector-trunc.ll
View File

@ -1869,28 +1869,11 @@ entry:
}
define <8 x i16> @PR32160(<8 x i32> %x) {
; SSE2-LABEL: PR32160:
; SSE2: # %bb.0:
; SSE2-NEXT: pslld $16, %xmm1
; SSE2-NEXT: psrad $16, %xmm1
; SSE2-NEXT: pslld $16, %xmm0
; SSE2-NEXT: psrad $16, %xmm0
; SSE2-NEXT: packssdw %xmm1, %xmm0
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[2,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; SSE2-NEXT: retq
;
; SSSE3-LABEL: PR32160:
; SSSE3: # %bb.0:
; SSSE3-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,6,7]
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
; SSSE3-NEXT: retq
;
; SSE41-LABEL: PR32160:
; SSE41: # %bb.0:
; SSE41-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,6,7]
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
; SSE41-NEXT: retq
; SSE-LABEL: PR32160:
; SSE: # %bb.0:
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2]
; SSE-NEXT: retq
;
; AVX1-LABEL: PR32160:
; AVX1: # %bb.0: