forked from OSchip/llvm-project
[X86] Run CFIInstrInserter on Windows if Dwarf is used
This is necessary since SVN r330706, as tail merging can include CFI instructions since then. This fixes PR40322 and PR40012. Differential Revision: https://reviews.llvm.org/D61252 llvm-svn: 359496
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1817377f10
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c0d138d147
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@ -37,6 +37,7 @@
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Function.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/Pass.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/CommandLine.h"
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@ -519,7 +520,10 @@ void X86PassConfig::addPreEmitPass2() {
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// correct CFA calculation rule where needed by inserting appropriate CFI
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// correct CFA calculation rule where needed by inserting appropriate CFI
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// instructions.
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// instructions.
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const Triple &TT = TM->getTargetTriple();
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const Triple &TT = TM->getTargetTriple();
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if (!TT.isOSDarwin() && !TT.isOSWindows())
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const MCAsmInfo *MAI = TM->getMCAsmInfo();
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if (!TT.isOSDarwin() &&
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(!TT.isOSWindows() ||
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MAI->getExceptionHandlingType() == ExceptionHandling::DwarfCFI))
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addPass(createCFIInstrInserter());
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addPass(createCFIInstrInserter());
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}
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}
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@ -0,0 +1,164 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-windows-gnu | FileCheck %s --check-prefix=CHECK-MINGW-X86
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%struct.as = type { i32* }
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@_ZZ2amiE2au = internal unnamed_addr global %struct.as zeroinitializer, align 4
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@_ZGVZ2amiE2au = internal global i64 0, align 8
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@_ZTIi = external constant i8*
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define void @_Z2ami(i32) #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
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; CHECK-MINGW-X86-LABEL: _Z2ami:
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; CHECK-MINGW-X86: # %bb.0: # %entry
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; CHECK-MINGW-X86-NEXT: pushl %edi
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; CHECK-MINGW-X86-NEXT: .cfi_def_cfa_offset 8
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; CHECK-MINGW-X86-NEXT: pushl %esi
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; CHECK-MINGW-X86-NEXT: .cfi_def_cfa_offset 12
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; CHECK-MINGW-X86-NEXT: .cfi_offset %esi, -12
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; CHECK-MINGW-X86-NEXT: .cfi_offset %edi, -8
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; CHECK-MINGW-X86-NEXT: movb __ZGVZ2amiE2au, %al
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; CHECK-MINGW-X86-NEXT: testb %al, %al
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; CHECK-MINGW-X86-NEXT: jne LBB0_4
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; CHECK-MINGW-X86-NEXT: # %bb.1: # %init.check
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x04
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; CHECK-MINGW-X86-NEXT: pushl $__ZGVZ2amiE2au
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll ___cxa_guard_acquire
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; CHECK-MINGW-X86-NEXT: addl $4, %esp
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset -4
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; CHECK-MINGW-X86-NEXT: testl %eax, %eax
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; CHECK-MINGW-X86-NEXT: je LBB0_4
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; CHECK-MINGW-X86-NEXT: # %bb.2: # %init
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; CHECK-MINGW-X86-NEXT: Ltmp0:
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x04
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; CHECK-MINGW-X86-NEXT: pushl $4
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll __Znwj
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; CHECK-MINGW-X86-NEXT: addl $4, %esp
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset -4
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; CHECK-MINGW-X86-NEXT: Ltmp1:
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; CHECK-MINGW-X86-NEXT: # %bb.3: # %invoke.cont
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; CHECK-MINGW-X86-NEXT: movl %eax, __ZZ2amiE2au
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x04
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; CHECK-MINGW-X86-NEXT: pushl $__ZGVZ2amiE2au
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll ___cxa_guard_release
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; CHECK-MINGW-X86-NEXT: addl $4, %esp
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset -4
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; CHECK-MINGW-X86-NEXT: LBB0_4: # %init.end
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x04
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; CHECK-MINGW-X86-NEXT: pushl $4
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll __Znwj
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; CHECK-MINGW-X86-NEXT: addl $4, %esp
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset -4
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; CHECK-MINGW-X86-NEXT: movl %eax, %esi
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x04
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; CHECK-MINGW-X86-NEXT: pushl $4
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll ___cxa_allocate_exception
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; CHECK-MINGW-X86-NEXT: addl $4, %esp
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset -4
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; CHECK-MINGW-X86-NEXT: movl $0, (%eax)
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; CHECK-MINGW-X86-NEXT: Ltmp3:
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x0c
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; CHECK-MINGW-X86-NEXT: movl .refptr.__ZTIi, %ecx
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; CHECK-MINGW-X86-NEXT: pushl $0
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: pushl %ecx
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: pushl %eax
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll ___cxa_throw
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; CHECK-MINGW-X86-NEXT: addl $12, %esp
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset -12
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; CHECK-MINGW-X86-NEXT: Ltmp4:
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; CHECK-MINGW-X86-NEXT: # %bb.8: # %unreachable
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; CHECK-MINGW-X86-NEXT: LBB0_5: # %lpad
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; CHECK-MINGW-X86-NEXT: Ltmp2:
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; CHECK-MINGW-X86-NEXT: movl %eax, %edi
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x04
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; CHECK-MINGW-X86-NEXT: pushl $__ZGVZ2amiE2au
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll ___cxa_guard_abort
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; CHECK-MINGW-X86-NEXT: jmp LBB0_7
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; CHECK-MINGW-X86-NEXT: LBB0_6: # %lpad1
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; CHECK-MINGW-X86-NEXT: .cfi_def_cfa_offset 12
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; CHECK-MINGW-X86-NEXT: Ltmp5:
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; CHECK-MINGW-X86-NEXT: movl %eax, %edi
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x04
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; CHECK-MINGW-X86-NEXT: pushl %esi
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll __ZdlPv
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; CHECK-MINGW-X86-NEXT: LBB0_7: # %eh.resume
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; CHECK-MINGW-X86-NEXT: addl $4, %esp
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset -4
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; CHECK-MINGW-X86-NEXT: .cfi_escape 0x2e, 0x04
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; CHECK-MINGW-X86-NEXT: pushl %edi
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; CHECK-MINGW-X86-NEXT: .cfi_adjust_cfa_offset 4
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; CHECK-MINGW-X86-NEXT: calll __Unwind_Resume
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; CHECK-MINGW-X86-NEXT: Lfunc_end0:
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entry:
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%1 = load atomic i8, i8* bitcast (i64* @_ZGVZ2amiE2au to i8*) acquire, align 8
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%guard.uninitialized = icmp eq i8 %1, 0
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br i1 %guard.uninitialized, label %init.check, label %init.end
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init.check: ; preds = %entry
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%2 = tail call i32 @__cxa_guard_acquire(i64* nonnull @_ZGVZ2amiE2au)
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%tobool = icmp eq i32 %2, 0
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br i1 %tobool, label %init.end, label %init
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init: ; preds = %init.check
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%call.i3 = invoke i8* @_Znwj(i32 4)
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to label %invoke.cont unwind label %lpad
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invoke.cont: ; preds = %init
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store i8* %call.i3, i8** bitcast (%struct.as* @_ZZ2amiE2au to i8**), align 4
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tail call void @__cxa_guard_release(i64* nonnull @_ZGVZ2amiE2au)
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br label %init.end
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init.end: ; preds = %init.check, %invoke.cont, %entry
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%call.i = tail call i8* @_Znwj(i32 4)
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%exception = tail call i8* @__cxa_allocate_exception(i32 4)
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%3 = bitcast i8* %exception to i32*
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store i32 0, i32* %3, align 16
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invoke void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null)
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to label %unreachable unwind label %lpad1
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lpad: ; preds = %init
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%4 = landingpad { i8*, i32 }
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cleanup
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%5 = extractvalue { i8*, i32 } %4, 0
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%6 = extractvalue { i8*, i32 } %4, 1
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tail call void @__cxa_guard_abort(i64* nonnull @_ZGVZ2amiE2au) #1
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br label %eh.resume
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lpad1: ; preds = %init.end
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%7 = landingpad { i8*, i32 }
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cleanup
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%8 = extractvalue { i8*, i32 } %7, 0
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%9 = extractvalue { i8*, i32 } %7, 1
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tail call void @_ZdlPv(i8* nonnull %call.i)
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br label %eh.resume
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eh.resume: ; preds = %lpad1, %lpad
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%exn.slot.0 = phi i8* [ %8, %lpad1 ], [ %5, %lpad ]
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%ehselector.slot.0 = phi i32 [ %9, %lpad1 ], [ %6, %lpad ]
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%lpad.val = insertvalue { i8*, i32 } undef, i8* %exn.slot.0, 0
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%lpad.val2 = insertvalue { i8*, i32 } %lpad.val, i32 %ehselector.slot.0, 1
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resume { i8*, i32 } %lpad.val2
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unreachable: ; preds = %init.end
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unreachable
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}
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declare i32 @__cxa_guard_acquire(i64*)
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declare i32 @__gxx_personality_v0(...)
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declare void @__cxa_guard_abort(i64*)
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declare void @__cxa_guard_release(i64*)
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declare i8* @__cxa_allocate_exception(i32)
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declare void @__cxa_throw(i8*, i8*, i8*)
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declare noalias nonnull i8* @_Znwj(i32)
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declare i8* @__cxa_begin_catch(i8*)
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declare void @__cxa_end_catch()
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declare void @_ZdlPv(i8*)
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