forked from OSchip/llvm-project
[GlobalISel][Tablegen] Fix SameOperandMatcher's isIdentical check
During rule optimization, identical SameOperandMatchers are hoisted into a common group, however previously only one operand index was considered. Commutable patterns can introduce SameOperandMatcher checks where the second index is commuted, resulting in a different check that cannot be hoisted. Reviewed By: qcolombet Differential Revision: https://reviews.llvm.org/D111506
This commit is contained in:
Konstantin Schwarz
parent
4d50803ce4
commit
c09f1fc74c
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@ -0,0 +1,102 @@
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// RUN: llvm-tblgen %s -gen-global-isel -optimize-match-table=true -I %p/../../include -I %p/Common -o - | FileCheck %s
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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def InstTwoOperands : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2), []>;
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def InstThreeOperands : I<(outs GPR32:$dst), (ins GPR32:$cond, GPR32:$src,GPR32:$src2), []>;
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// CHECK: GIM_Try, /*On fail goto*//*Label 0*/ 219,
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_SELECT,
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// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 1*/ 189,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/2,
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// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 2*/ 108, // Rule ID 1 //
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// CHECK-NEXT: GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ICMP,
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// CHECK-NEXT: GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
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// CHECK-NEXT: // MIs[1] Operand 1
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// CHECK-NEXT: GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::ICMP_EQ,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckConstantInt, /*MI*/1, /*Op*/3, 0,
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// CHECK-NEXT: GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SUB,
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// CHECK-NEXT: GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/1,
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// CHECK-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/2,
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// CHECK-NEXT: // (select:{ *:[i32] } (setcc:{ *:[i32] } GPR32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETEQ:{ *:[Other] }), (sub:{ *:[i32] } GPR32:{ *:[i32] }:$src1, GPR32:{ *:[i32] }:$src2), GPR32:{ *:[i32] }:$src2) => (InstThreeOperands:{ *:[i32] } GPR32:{ *:[i32] }:$cond, GPR32:{ *:[i32] }:$src1, GPR32:{ *:[i32] }:$src2)
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// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/MyTarget::InstThreeOperands,
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src1
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // src2
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// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
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// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
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// CHECK-NEXT: // GIR_Coverage, 1,
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: // Label 2: @108
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// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/ 188, // Rule ID 2 //
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// CHECK-NEXT: GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ICMP,
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// CHECK-NEXT: GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
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// CHECK-NEXT: // MIs[1] Operand 1
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// CHECK-NEXT: GIM_CheckCmpPredicate, /*MI*/1, /*Op*/1, /*Predicate*/CmpInst::ICMP_NE,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckConstantInt, /*MI*/1, /*Op*/3, 0,
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// CHECK-NEXT: GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
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// CHECK-NEXT: GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SUB,
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// CHECK-NEXT: GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/1,
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// CHECK-NEXT: GIM_CheckIsSafeToFold, /*InsnID*/2,
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// CHECK-NEXT: // (select:{ *:[i32] } (setcc:{ *:[i32] } GPR32:{ *:[i32] }:$cond, 0:{ *:[i32] }, SETNE:{ *:[Other] }), (sub:{ *:[i32] } GPR32:{ *:[i32] }:$src1, GPR32:{ *:[i32] }:$src2), GPR32:{ *:[i32] }:$src2) => (InstThreeOperands:{ *:[i32] } GPR32:{ *:[i32] }:$cond, GPR32:{ *:[i32] }:$src1, GPR32:{ *:[i32] }:$src2)
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// CHECK-NEXT: GIR_BuildMI, /*InsnID*/0, /*Opcode*/MyTarget::InstThreeOperands,
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // cond
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src1
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// CHECK-NEXT: GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // src2
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// CHECK-NEXT: GIR_EraseFromParent, /*InsnID*/0,
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// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
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// CHECK-NEXT: // GIR_Coverage, 2,
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: // Label 3: @188
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// CHECK-NEXT: GIM_Reject,
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// CHECK-NEXT: // Label 1: @189
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// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 4*/ 218, // Rule ID 0 //
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// CHECK-NEXT: GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NEXT: // (select:{ *:[i32] } GPR32:{ *:[i32] }:$cond, GPR32:{ *:[i32] }:$src1, GPR32:{ *:[i32] }:$src2) => (InstThreeOperands:{ *:[i32] } GPR32:{ *:[i32] }:$cond, GPR32:{ *:[i32] }:$src1, GPR32:{ *:[i32] }:$src2)
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// CHECK-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/MyTarget::InstThreeOperands,
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// CHECK-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
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// CHECK-NEXT: // GIR_Coverage, 0,
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// CHECK-NEXT: GIR_Done,
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// CHECK-NEXT: // Label 4: @218
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// CHECK-NEXT: GIM_Reject,
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// CHECK-NEXT: // Label 0: @219
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// CHECK-NEXT: GIM_Reject,
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// CHECK-NEXT: }
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def : Pat<(i32 (select GPR32:$cond, GPR32:$src1, GPR32:$src2)),
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(InstThreeOperands GPR32:$cond, GPR32:$src1, GPR32:$src2)>;
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def : Pat<(i32 (select (i32 (setcc GPR32:$cond, (i32 0), (OtherVT SETEQ))),
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(i32 (sub GPR32:$src1, GPR32:$src2)),
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GPR32:$src2)),
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(InstThreeOperands GPR32:$cond, GPR32:$src1, GPR32:$src2)>;
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def : Pat<(i32 (select (i32 (setcc GPR32:$cond, (i32 0), (OtherVT SETNE))),
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(i32 (sub GPR32:$src1, GPR32:$src2)),
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GPR32:$src2)),
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(InstThreeOperands GPR32:$cond, GPR32:$src1, GPR32:$src2)>;
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@ -0,0 +1,26 @@
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// RUN: llvm-tblgen %s -gen-global-isel -optimize-match-table=true -I %p/../../include -I %p/Common -o - | FileCheck %s
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include "llvm/Target/Target.td"
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include "GlobalISelEmitterCommon.td"
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def InstTwoOperands : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2), []>;
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def InstThreeOperands : I<(outs GPR32:$dst), (ins GPR32:$cond, GPR32:$src,GPR32:$src2), []>;
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// Make sure the GIM_CheckIsSameOperand check is not hoisted into the common header group
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// CHECK: GIM_Try, /*On fail goto*//*Label 1*/
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// CHECK-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
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// CHECK-NOT: GIM_CheckIsSameOperand
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// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 2*/
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// CHECK: GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/1,
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// CHECK: // Label 2
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// CHECK-NEXT: GIM_Try, /*On fail goto*//*Label 3*/
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// CHECK: GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/3, /*OtherMI*/2, /*OtherOpIdx*/2,
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// CHECK: // Label 1
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def : Pat<(i32 (select GPR32:$cond, GPR32:$src1, GPR32:$src2)),
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(InstThreeOperands GPR32:$cond, GPR32:$src1, GPR32:$src2)>;
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def : Pat<(i32 (select (i32 (setcc GPR32:$cond, (i32 0), (OtherVT SETEQ))),
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(i32 (add GPR32:$src1, GPR32:$const)),
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GPR32:$src1)),
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(InstThreeOperands GPR32:$cond, GPR32:$src1, GPR32:$const)>;
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@ -1212,11 +1212,13 @@ PredicateListMatcher<OperandPredicateMatcher>::getNoPredicateComment() const {
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/// one as another.
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class SameOperandMatcher : public OperandPredicateMatcher {
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std::string MatchingName;
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unsigned OrigOpIdx;
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public:
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SameOperandMatcher(unsigned InsnVarID, unsigned OpIdx, StringRef MatchingName)
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SameOperandMatcher(unsigned InsnVarID, unsigned OpIdx, StringRef MatchingName,
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unsigned OrigOpIdx)
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: OperandPredicateMatcher(OPM_SameOperand, InsnVarID, OpIdx),
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MatchingName(MatchingName) {}
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MatchingName(MatchingName), OrigOpIdx(OrigOpIdx) {}
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static bool classof(const PredicateMatcher *P) {
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return P->getKind() == OPM_SameOperand;
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@ -1227,6 +1229,7 @@ public:
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bool isIdentical(const PredicateMatcher &B) const override {
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return OperandPredicateMatcher::isIdentical(B) &&
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OrigOpIdx == cast<SameOperandMatcher>(&B)->OrigOpIdx &&
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MatchingName == cast<SameOperandMatcher>(&B)->MatchingName;
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}
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};
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@ -3291,7 +3294,8 @@ void RuleMatcher::defineOperand(StringRef SymbolicName, OperandMatcher &OM) {
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// If the operand is already defined, then we must ensure both references in
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// the matcher have the exact same node.
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OM.addPredicate<SameOperandMatcher>(OM.getSymbolicName());
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OM.addPredicate<SameOperandMatcher>(
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OM.getSymbolicName(), getOperandMatcher(OM.getSymbolicName()).getOpIdx());
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}
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void RuleMatcher::definePhysRegOperand(Record *Reg, OperandMatcher &OM) {
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