From c084e840280e5ac7ac7bf33711ad7a923d6183cc Mon Sep 17 00:00:00 2001
From: Jim Grosbach <grosbach@apple.com>
Date: Tue, 7 Oct 2008 19:05:35 +0000
Subject: [PATCH] Encode the conditional execution predicate when JITing.

llvm-svn: 57258
---
 llvm/lib/Target/ARM/ARMCodeEmitter.cpp | 20 ++++++++++----------
 llvm/lib/Target/ARM/ARMInstrInfo.h     |  6 ++++++
 2 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
index 13f7903402ee..574c14e00c6f 100644
--- a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -256,8 +256,8 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) {
 unsigned ARMCodeEmitter::getAddrModeNoneInstrBinary(const MachineInstr &MI,
                                                     const TargetInstrDesc &TID,
                                                     unsigned Binary) {
-  // FIXME: Assume CC is AL for now.
-  Binary |= ARMCC::AL << 28;
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << 28;
 
   switch (TID.TSFlags & ARMII::FormMask) {
   default:
@@ -376,8 +376,8 @@ void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) {
 unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
                                                  const TargetInstrDesc &TID,
                                                  unsigned Binary) {
-  // FIXME: Assume CC is AL for now.
-  Binary |= ARMCC::AL << 28;
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << 28;
 
   // Encode S bit if MI modifies CPSR.
   Binary |= getAddrMode1SBit(MI, TID);
@@ -429,8 +429,8 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
 unsigned ARMCodeEmitter::getAddrMode2InstrBinary(const MachineInstr &MI,
                                                  const TargetInstrDesc &TID,
                                                  unsigned Binary) {
-  // FIXME: Assume CC is AL for now.
-  Binary |= ARMCC::AL << 28;
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << 28;
 
   // Set first operand
   Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
@@ -470,8 +470,8 @@ unsigned ARMCodeEmitter::getAddrMode2InstrBinary(const MachineInstr &MI,
 unsigned ARMCodeEmitter::getAddrMode3InstrBinary(const MachineInstr &MI,
                                                  const TargetInstrDesc &TID,
                                                  unsigned Binary) {
-  // FIXME: Assume CC is AL for now.
-  Binary |= ARMCC::AL << 28;
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << 28;
 
   // Set first operand
   Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift;
@@ -507,8 +507,8 @@ unsigned ARMCodeEmitter::getAddrMode3InstrBinary(const MachineInstr &MI,
 unsigned ARMCodeEmitter::getAddrMode4InstrBinary(const MachineInstr &MI,
                                                  const TargetInstrDesc &TID,
                                                  unsigned Binary) {
-  // FIXME: Assume CC is AL for now.
-  Binary |= ARMCC::AL << 28;
+  // Set the conditional execution predicate
+  Binary |= II->getPredicate(&MI) << 28;
 
   // Set first operand
   Binary |= getMachineOpValue(MI, 0) << ARMII::RegRnShift;
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.h b/llvm/lib/Target/ARM/ARMInstrInfo.h
index 0b27bfbcdc02..da22521b8306 100644
--- a/llvm/lib/Target/ARM/ARMInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.h
@@ -217,6 +217,12 @@ public:
   // Predication support.
   virtual bool isPredicated(const MachineInstr *MI) const;
 
+  ARMCC::CondCodes getPredicate(const MachineInstr *MI) const {
+    int PIdx = MI->findFirstPredOperandIdx();
+    return PIdx != -1 ? (ARMCC::CondCodes)MI->getOperand(PIdx).getImm() 
+                      : ARMCC::AL;
+  }
+
   virtual
   bool PredicateInstruction(MachineInstr *MI,
                             const SmallVectorImpl<MachineOperand> &Pred) const;