forked from OSchip/llvm-project
Add support for some extended push instructions in i386/x86_64 like
'push 0x20(%esp)' which clang can generate when emitting -fomit-frame-pointer code for 32-bit. Add a unit test program which includes this instruction. Also fix a bug in the refactoring/rewrite of the x86 assembly instruction profiler where I'd hard coded it as a 64-bit disassembler instead of using the ArchSpec to pick a 32-bit or 64-bit disassembler from llvm. When the disassembler would hit an instruction that is invalid in 64-bit mode, it would stop disassembling the function. This likely led to the TestSBData testsuite failure on linux with 32-bit i386 and gcc-4.9; I'll test that in a bit. The newly added unit test program is 32-bit i386 code and it includes an instruction which is invalid in 64-bit mode so it will catch this. <rdar://problem/28557876> llvm-svn: 282991
This commit is contained in:
parent
8cc2bddb32
commit
c0657a6ceb
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@ -29,10 +29,9 @@ x86AssemblyInspectionEngine::x86AssemblyInspectionEngine(const ArchSpec &arch)
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m_reg_map(), m_arch(arch), m_cpu(k_cpu_unspecified), m_wordsize(-1),
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m_register_map_initialized(false), m_disasm_context() {
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m_disasm_context = ::LLVMCreateDisasm("x86_64-apple-macosx", nullptr,
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/*TagType=*/1, nullptr, nullptr);
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// ::LLVMCreateDisasm(arch.GetTriple().getTriple().c_str(), nullptr,
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// /*TagType=*/1, nullptr, nullptr);
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m_disasm_context =
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::LLVMCreateDisasm(arch.GetTriple().getTriple().c_str(), nullptr,
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/*TagType=*/1, nullptr, nullptr);
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}
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x86AssemblyInspectionEngine::~x86AssemblyInspectionEngine() {
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@ -320,6 +319,50 @@ bool x86AssemblyInspectionEngine::push_imm_pattern_p() {
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return false;
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}
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// pushl imm8(%esp)
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//
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// e.g. 0xff 0x74 0x24 0x20 - 'pushl 0x20(%esp)'
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// (same byte pattern for 'pushq 0x20(%rsp)' in an x86_64 program)
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//
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// 0xff (with opcode bits '6' in next byte, PUSH r/m32)
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// 0x74 (ModR/M byte with three bits used to specify the opcode)
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// mod == b01, opcode == b110, R/M == b100
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// "+disp8"
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// 0x24 (SIB byte - scaled index = 0, r32 == esp)
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// 0x20 imm8 value
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bool x86AssemblyInspectionEngine::push_extended_pattern_p() {
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if (*m_cur_insn == 0xff) {
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// Get the 3 opcode bits from the ModR/M byte
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uint8_t opcode = (*(m_cur_insn + 1) >> 3) & 7;
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if (opcode == 6) {
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// I'm only looking for 0xff /6 here - I
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// don't really care what value is being pushed,
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// just that we're pushing a 32/64 bit value on
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// to the stack is enough.
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return true;
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}
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}
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return false;
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}
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// pushq %rbx
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// pushl %ebx
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bool x86AssemblyInspectionEngine::push_reg_p(int ®no) {
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uint8_t *p = m_cur_insn;
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int regno_prefix_bit = 0;
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// If we have a rex prefix byte, check to see if a B bit is set
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if (m_wordsize == 8 && *p == 0x41) {
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regno_prefix_bit = 1 << 3;
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p++;
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}
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if (*p >= 0x50 && *p <= 0x57) {
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regno = (*p - 0x50) | regno_prefix_bit;
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return true;
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}
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return false;
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}
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// movq %rsp, %rbp [0x48 0x8b 0xec] or [0x48 0x89 0xe5]
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// movl %esp, %ebp [0x8b 0xec] or [0x89 0xe5]
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bool x86AssemblyInspectionEngine::mov_rsp_rbp_pattern_p() {
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@ -395,23 +438,6 @@ bool x86AssemblyInspectionEngine::lea_rsp_pattern_p(int &amount) {
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return false;
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}
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// pushq %rbx
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// pushl %ebx
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bool x86AssemblyInspectionEngine::push_reg_p(int ®no) {
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uint8_t *p = m_cur_insn;
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int regno_prefix_bit = 0;
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// If we have a rex prefix byte, check to see if a B bit is set
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if (m_wordsize == 8 && *p == 0x41) {
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regno_prefix_bit = 1 << 3;
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p++;
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}
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if (*p >= 0x50 && *p <= 0x57) {
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regno = (*p - 0x50) | regno_prefix_bit;
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return true;
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}
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return false;
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}
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// popq %rbx
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// popl %ebx
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bool x86AssemblyInspectionEngine::pop_reg_p(int ®no) {
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@ -762,6 +788,14 @@ bool x86AssemblyInspectionEngine::GetNonCallSiteUnwindPlanFromAssembly(
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in_epilogue = true;
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}
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else if (push_extended_pattern_p() || push_imm_pattern_p()) {
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current_sp_bytes_offset_from_cfa += m_wordsize;
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if (row->GetCFAValue().GetRegisterNumber() == m_lldb_sp_regnum) {
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row->GetCFAValue().SetOffset(current_sp_bytes_offset_from_cfa);
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row_updated = true;
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}
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}
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else if (lea_rsp_pattern_p(stack_offset)) {
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current_sp_bytes_offset_from_cfa -= stack_offset;
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if (row->GetCFAValue().GetRegisterNumber() == m_lldb_sp_regnum) {
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@ -1002,6 +1036,16 @@ bool x86AssemblyInspectionEngine::AugmentUnwindPlanFromCallSite(
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continue;
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}
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// push extended
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if (push_extended_pattern_p()) {
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row->SetOffset(offset);
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row->GetCFAValue().IncOffset(m_wordsize);
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UnwindPlan::RowSP new_row(new UnwindPlan::Row(*row));
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unwind_plan.InsertRow(new_row);
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unwind_plan_updated = true;
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continue;
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}
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// add/sub %rsp/%esp
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int amount;
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if (add_rsp_pattern_p(amount)) {
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// [0x5d] pop %rbp/%ebp
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// => [0xc3] ret
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if (pop_rbp_pattern_p() || leave_pattern_p()) {
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offset += 1;
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row->SetOffset(offset);
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row->GetCFAValue().SetIsRegisterPlusOffset(
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first_row->GetCFAValue().GetRegisterNumber(), m_wordsize);
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offset += 1;
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row->SetOffset(offset);
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row->GetCFAValue().SetIsRegisterPlusOffset(
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first_row->GetCFAValue().GetRegisterNumber(), m_wordsize);
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UnwindPlan::RowSP new_row(new UnwindPlan::Row(*row));
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unwind_plan.InsertRow(new_row);
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unwind_plan_updated = true;
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reinstate_unwind_state = true;
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continue;
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UnwindPlan::RowSP new_row(new UnwindPlan::Row(*row));
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unwind_plan.InsertRow(new_row);
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unwind_plan_updated = true;
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reinstate_unwind_state = true;
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continue;
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}
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} else {
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// CFA register is not sp or fp.
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@ -96,6 +96,7 @@ private:
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bool push_rbp_pattern_p();
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bool push_0_pattern_p();
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bool push_imm_pattern_p();
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bool push_extended_pattern_p();
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bool mov_rsp_rbp_pattern_p();
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bool sub_rsp_pattern_p(int &amount);
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bool add_rsp_pattern_p(int &amount);
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@ -447,9 +447,304 @@ TEST_F(Testx86AssemblyInspectionEngine, Test64bitFramelessBigStackFrame) {
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EXPECT_FALSE(row_sp->GetRegisterInfo(k_r13, regloc));
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EXPECT_FALSE(row_sp->GetRegisterInfo(k_r14, regloc));
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EXPECT_FALSE(row_sp->GetRegisterInfo(k_r15, regloc));
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}
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TEST_F(Testx86AssemblyInspectionEngine, Test32bitFramelessBigStackFrame) {
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std::unique_ptr<x86AssemblyInspectionEngine> engine = Geti386Inspector();
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// this source file:
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//
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// #include <stdio.h>
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// int main (int argc, char **argv)
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// {
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//
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// const int arrsize = 60;
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// int buf[arrsize * arrsize];
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// int accum = argc;
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// for (int i = 0; i < arrsize; i++)
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// for (int j = 0; j < arrsize; j++)
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// {
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// if (i > 0 && j > 0)
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// {
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// int n = buf[(i-1) * (j-1)] * 2;
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// int m = buf[(i-1) * (j-1)] / 2;
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// int j = buf[(i-1) * (j-1)] + 2;
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// int k = buf[(i-1) * (j-1)] - 2;
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// printf ("%d ", n + m + j + k);
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// buf[(i-1) * (j-1)] += n - m + j - k;
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// }
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// buf[i*j] = accum++;
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// }
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//
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// return buf[(arrsize * arrsize) - 2] + printf ("%d\n", buf[(arrsize *
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// arrsize) - 3]);
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// }
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//
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// compiled 'clang -arch i386 -fomit-frame-pointer -Os' for i386-apple-macosx
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// simplified assembly version of the above function, which is used as the
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// input
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// data:
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//
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// .section __TEXT,__text,regular,pure_instructions
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// .macosx_version_min 10, 12
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// .globl _main
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// .align 4, 0x90
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// _main: ## @main
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// ## BB#0:
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// pushl %ebp
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// pushl %ebx
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// pushl %edi
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// pushl %esi
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// L0$pb:
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// subl $0x386c, %esp
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// calll L1
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// L1:
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// popl %ecx
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// movl %ecx, 0x8(%esp)
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// subl $0x8, %esp
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// pushl %eax
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// pushl 0x20(%esp)
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// calll _puts
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// addl $0x10, %esp
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// incl %ebx
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// addl $0x386c, %esp
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// popl %esi
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// popl %edi
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// popl %ebx
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// popl %ebp
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// retl
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//
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// .section __TEXT,__cstring,cstring_literals
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// L_.str: ## @.str
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// .asciz "HI"
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//
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//
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// .subsections_via_symbols
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uint8_t data[] = {
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0x55,
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// offset 0 -- pushl %ebp
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0x53,
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// offset 1 -- pushl %ebx
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0x57,
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// offset 2 -- pushl %edi
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0x56,
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// offset 3 -- pushl %esi
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0x81, 0xec, 0x6c, 0x38, 0x00, 0x00,
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// offset 4 -- subl $0x386c, %esp
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0xe8, 0x00, 0x00, 0x00, 0x00,
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// offset 10 -- calll 0
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// call the next instruction, to put the pc on the stack
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0x59,
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// offset 15 -- popl %ecx
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// pop the saved pc address into ecx
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0x89, 0x4c, 0x24, 0x08,
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// offset 16 -- movl %ecx, 0x8(%esp)
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// ....
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0x83, 0xec, 0x08,
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// offset 20 -- subl $0x8, %esp
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0x50,
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// offset 23 -- pushl %eax
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0xff, 0x74, 0x24, 0x20,
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// offset 24 -- pushl 0x20(%esp)
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0xe8, 0x8c, 0x00, 0x00, 0x00,
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// offset 28 -- calll puts
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0x83, 0xc4, 0x10,
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// offset 33 -- addl $0x10, %esp
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// get esp back to the value it was before the
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// alignment & argument saves for the puts call
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0x43,
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// offset 36 -- incl %ebx
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// ....
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0x81, 0xc4, 0x6c, 0x38, 0x00, 0x00,
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// offset 37 -- addl $0x386c, %esp
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0x5e,
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// offset 43 -- popl %esi
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0x5f,
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// offset 44 -- popl %edi
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0x5b,
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// offset 45 -- popl %ebx
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0x5d,
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// offset 46 -- popl %ebp
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0xc3,
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// offset 47 -- retl
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0xe8, 0x12, 0x34, 0x56, 0x78,
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// offset 48 -- calll __stack_chk_fail
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};
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AddressRange sample_range(0x1000, sizeof(data));
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UnwindPlan unwind_plan(eRegisterKindLLDB);
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EXPECT_TRUE(engine->GetNonCallSiteUnwindPlanFromAssembly(
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data, sizeof(data), sample_range, unwind_plan));
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// Unwind rules should look like
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//
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// 0: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
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// 1: CFA=esp +8 => ebp=[CFA-8] esp=CFA+0 eip=[CFA-4]
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// 2: CFA=esp+12 => ebx=[CFA-12] ebp=[CFA-8] esp=CFA+0 eip=[CFA-4]
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// 3: CFA=esp+16 => ebx=[CFA-12] edi=[CFA-16] ebp=[CFA-8] esp=CFA+0
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// eip=[CFA-4]
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// 4: CFA=esp+20 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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// 10: CFA=esp+14464 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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// 15: CFA=esp+14468 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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// 16: CFA=esp+14464 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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//
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// ....
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//
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// 23: CFA=esp+14472 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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// 24: CFA=esp+14476 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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// 28: CFA=esp+14480 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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// 36: CFA=esp+14464 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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//
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// .....
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//
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// 37: CFA=esp+14464 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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// 43: CFA=esp+20 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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// 44: CFA=esp+16 => ebx=[CFA-12] edi=[CFA-16] ebp=[CFA-8] esp=CFA+0
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// eip=[CFA-4]
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// 45: CFA=esp+12 => ebx=[CFA-12] ebp=[CFA-8] esp=CFA+0 eip=[CFA-4]
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// 46: CFA=esp +8 => ebp=[CFA-8] esp=CFA+0 eip=[CFA-4]
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// 47: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
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// 48: CFA=esp+14480 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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UnwindPlan::Row::RegisterLocation regloc;
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UnwindPlan::RowSP row_sp;
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// Check that we get the CFA correct for the pic base setup sequence
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// CFA=esp+14464 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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row_sp = unwind_plan.GetRowForFunctionOffset(10);
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EXPECT_EQ(10, row_sp->GetOffset());
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EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_esp);
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EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
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EXPECT_EQ(14464, row_sp->GetCFAValue().GetOffset());
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// 15: CFA=esp+14468 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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row_sp = unwind_plan.GetRowForFunctionOffset(15);
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EXPECT_EQ(15, row_sp->GetOffset());
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EXPECT_EQ(14468, row_sp->GetCFAValue().GetOffset());
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// 16: CFA=esp+14464 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
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// esp=CFA+0 eip=[CFA-4]
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row_sp = unwind_plan.GetRowForFunctionOffset(16);
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EXPECT_EQ(16, row_sp->GetOffset());
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EXPECT_EQ(14464, row_sp->GetCFAValue().GetOffset());
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// Check that the row for offset 16 has the registers saved that we expect
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EXPECT_TRUE(row_sp->GetRegisterInfo(k_eip, regloc));
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EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
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EXPECT_EQ(-4, regloc.GetOffset());
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EXPECT_TRUE(row_sp->GetRegisterInfo(k_ebp, regloc));
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EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
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EXPECT_EQ(-8, regloc.GetOffset());
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EXPECT_TRUE(row_sp->GetRegisterInfo(k_ebx, regloc));
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EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
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EXPECT_EQ(-12, regloc.GetOffset());
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EXPECT_TRUE(row_sp->GetRegisterInfo(k_edi, regloc));
|
||||
EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
|
||||
EXPECT_EQ(-16, regloc.GetOffset());
|
||||
|
||||
EXPECT_TRUE(row_sp->GetRegisterInfo(k_esi, regloc));
|
||||
EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
|
||||
EXPECT_EQ(-20, regloc.GetOffset());
|
||||
|
||||
//
|
||||
// Check the pushing & popping around the call printf instruction
|
||||
|
||||
// 23: CFA=esp+14472 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
|
||||
// esp=CFA+0 eip=[CFA-4]
|
||||
row_sp = unwind_plan.GetRowForFunctionOffset(23);
|
||||
EXPECT_EQ(23, row_sp->GetOffset());
|
||||
EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_esp);
|
||||
EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
|
||||
EXPECT_EQ(14472, row_sp->GetCFAValue().GetOffset());
|
||||
|
||||
// 24: CFA=esp+14476 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
|
||||
// esp=CFA+0 eip=[CFA-4]
|
||||
row_sp = unwind_plan.GetRowForFunctionOffset(24);
|
||||
EXPECT_EQ(24, row_sp->GetOffset());
|
||||
EXPECT_EQ(14476, row_sp->GetCFAValue().GetOffset());
|
||||
|
||||
// 28: CFA=esp+14480 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
|
||||
// esp=CFA+0 eip=[CFA-4]
|
||||
row_sp = unwind_plan.GetRowForFunctionOffset(28);
|
||||
EXPECT_EQ(28, row_sp->GetOffset());
|
||||
EXPECT_EQ(14480, row_sp->GetCFAValue().GetOffset());
|
||||
|
||||
// 36: CFA=esp+14464 => ebx=[CFA-12] edi=[CFA-16] esi=[CFA-20] ebp=[CFA-8]
|
||||
// esp=CFA+0 eip=[CFA-4]
|
||||
row_sp = unwind_plan.GetRowForFunctionOffset(36);
|
||||
EXPECT_EQ(36, row_sp->GetOffset());
|
||||
EXPECT_EQ(14464, row_sp->GetCFAValue().GetOffset());
|
||||
|
||||
// Check that the epilogue gets us back to the original unwind state
|
||||
|
||||
// 47: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
|
||||
row_sp = unwind_plan.GetRowForFunctionOffset(47);
|
||||
EXPECT_EQ(47, row_sp->GetOffset());
|
||||
EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_esp);
|
||||
EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
|
||||
EXPECT_EQ(4, row_sp->GetCFAValue().GetOffset());
|
||||
|
||||
EXPECT_TRUE(row_sp->GetRegisterInfo(k_eip, regloc));
|
||||
EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
|
||||
EXPECT_EQ(-4, regloc.GetOffset());
|
||||
|
||||
EXPECT_TRUE(row_sp->GetRegisterInfo(k_esp, regloc));
|
||||
EXPECT_TRUE(regloc.IsCFAPlusOffset());
|
||||
EXPECT_EQ(0, regloc.GetOffset());
|
||||
|
||||
// Check that no unexpected registers were saved
|
||||
|
||||
EXPECT_FALSE(row_sp->GetRegisterInfo(k_eax, regloc));
|
||||
EXPECT_FALSE(row_sp->GetRegisterInfo(k_ebx, regloc));
|
||||
EXPECT_FALSE(row_sp->GetRegisterInfo(k_ecx, regloc));
|
||||
EXPECT_FALSE(row_sp->GetRegisterInfo(k_edx, regloc));
|
||||
EXPECT_FALSE(row_sp->GetRegisterInfo(k_esi, regloc));
|
||||
EXPECT_FALSE(row_sp->GetRegisterInfo(k_edi, regloc));
|
||||
EXPECT_FALSE(row_sp->GetRegisterInfo(k_ebp, regloc));
|
||||
}
|
||||
|
||||
TEST_F(Testx86AssemblyInspectionEngine, Test64bitFramelessSmallStackFrame) {
|
||||
std::unique_ptr<x86AssemblyInspectionEngine> engine = Getx86_64Inspector();
|
||||
|
@ -463,18 +758,18 @@ TEST_F(Testx86AssemblyInspectionEngine, Test64bitFramelessSmallStackFrame) {
|
|||
// compiled 'clang -fomit-frame-pointer' for x86_64-apple-macosx
|
||||
|
||||
uint8_t data[] = {
|
||||
0x50,
|
||||
0x50,
|
||||
// offset 0 -- pushq %rax
|
||||
|
||||
0x48, 0x8d, 0x3d, 0x32, 0x00, 0x00, 0x00,
|
||||
0x48, 0x8d, 0x3d, 0x32, 0x00, 0x00, 0x00,
|
||||
// offset 1 -- leaq 0x32(%rip), %rdi ; "HI"
|
||||
|
||||
0xe8, 0x0b, 0x00, 0x00, 0x00,
|
||||
0xe8, 0x0b, 0x00, 0x00, 0x00,
|
||||
// offset 8 -- callq 0x100000f58 ; puts
|
||||
|
||||
0x31, 0xc9,
|
||||
// offset 13 -- xorl %ecx, %ecx
|
||||
|
||||
|
||||
0x89, 0x44, 0x24, 0x04,
|
||||
// offset 15 -- movl %eax, 0x4(%rsp)
|
||||
|
||||
|
@ -495,14 +790,14 @@ TEST_F(Testx86AssemblyInspectionEngine, Test64bitFramelessSmallStackFrame) {
|
|||
data, sizeof(data), sample_range, unwind_plan));
|
||||
|
||||
// Unwind rules should look like
|
||||
// 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8]
|
||||
// 1: CFA=rsp+16 => rsp=CFA+0 rip=[CFA-8]
|
||||
// 22: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8]
|
||||
// 0: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8]
|
||||
// 1: CFA=rsp+16 => rsp=CFA+0 rip=[CFA-8]
|
||||
// 22: CFA=rsp +8 => rsp=CFA+0 rip=[CFA-8]
|
||||
|
||||
UnwindPlan::Row::RegisterLocation regloc;
|
||||
|
||||
// grab the Row for when the prologue has finished executing:
|
||||
// 1: CFA=rsp+16 => rsp=CFA+0 rip=[CFA-8]
|
||||
// 1: CFA=rsp+16 => rsp=CFA+0 rip=[CFA-8]
|
||||
|
||||
UnwindPlan::RowSP row_sp = unwind_plan.GetRowForFunctionOffset(13);
|
||||
|
||||
|
@ -548,7 +843,6 @@ TEST_F(Testx86AssemblyInspectionEngine, Test64bitFramelessSmallStackFrame) {
|
|||
EXPECT_EQ(-8, regloc.GetOffset());
|
||||
}
|
||||
|
||||
|
||||
TEST_F(Testx86AssemblyInspectionEngine, Test32bitFramelessSmallStackFrame) {
|
||||
std::unique_ptr<x86AssemblyInspectionEngine> engine = Geti386Inspector();
|
||||
|
||||
|
@ -563,7 +857,7 @@ TEST_F(Testx86AssemblyInspectionEngine, Test32bitFramelessSmallStackFrame) {
|
|||
uint8_t data[] = {
|
||||
0x83, 0xec, 0x0c,
|
||||
// offset 0 -- subl $0xc, %esp
|
||||
|
||||
|
||||
0xe8, 0x00, 0x00, 0x00, 0x00,
|
||||
// offset 3 -- calll 0 {call the next instruction, to put the pc on
|
||||
// the stack}
|
||||
|
@ -603,11 +897,11 @@ TEST_F(Testx86AssemblyInspectionEngine, Test32bitFramelessSmallStackFrame) {
|
|||
data, sizeof(data), sample_range, unwind_plan));
|
||||
|
||||
// Unwind rules should look like
|
||||
// row[0]: 0: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[1]: 3: CFA=esp+16 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[2]: 8: CFA=esp+20 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[3]: 9: CFA=esp+16 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[4]: 34: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[0]: 0: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[1]: 3: CFA=esp+16 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[2]: 8: CFA=esp+20 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[3]: 9: CFA=esp+16 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[4]: 34: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
|
||||
|
||||
UnwindPlan::Row::RegisterLocation regloc;
|
||||
|
||||
|
@ -631,7 +925,7 @@ TEST_F(Testx86AssemblyInspectionEngine, Test32bitFramelessSmallStackFrame) {
|
|||
EXPECT_EQ(20, row_sp->GetCFAValue().GetOffset());
|
||||
|
||||
// Check unwind state after we pop the pic base value off the stack
|
||||
// row[3]: 9: CFA=esp+16 => esp=CFA+0 eip=[CFA-4]
|
||||
// row[3]: 9: CFA=esp+16 => esp=CFA+0 eip=[CFA-4]
|
||||
|
||||
row_sp = unwind_plan.GetRowForFunctionOffset(9);
|
||||
EXPECT_EQ(9, row_sp->GetOffset());
|
||||
|
@ -650,7 +944,7 @@ TEST_F(Testx86AssemblyInspectionEngine, Test32bitFramelessSmallStackFrame) {
|
|||
EXPECT_FALSE(row_sp->GetRegisterInfo(k_ebp, regloc));
|
||||
|
||||
// verify that we get back to the original unwind state before the ret
|
||||
// 34: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
|
||||
// 34: CFA=esp +4 => esp=CFA+0 eip=[CFA-4]
|
||||
|
||||
row_sp = unwind_plan.GetRowForFunctionOffset(34);
|
||||
EXPECT_EQ(34, row_sp->GetOffset());
|
||||
|
|
Loading…
Reference in New Issue