maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

LLParser: add an argument for overriding data layout and do not check alloca addr space 

Sometimes users do not specify data layout in LLVM assembly and let llc set the
data layout by target triple after loading the LLVM assembly.

Currently the parser checks alloca address space no matter whether the LLVM
assembly contains data layout definition, which causes false alarm since the
default data layout does not contain the correct alloca address space.

The parser also calls verifier to check debug info and updating invalid debug
info. Currently there is no way to let the verifier to check debug info only.
If the verifier finds non-debug-info issues the parser will fail.

For llc, the fix is to remove the check of alloca addr space in the parser and
disable updating debug info, and defer the updating of debug info and
verification to be after setting data layout of the IR by target.

For other llvm tools, since they do not override data layout by target but
instead can override data layout by a command line option, an argument for
overriding data layout is added to the parser. In cases where data layout
overriding is necessary for the parser, the data layout can be provided by
command line.

Differential Revision: https://reviews.llvm.org/D41832

llvm-svn: 323826
This commit is contained in:
Yaxun Liu 2018-01-30 22:32:39 +00:00
parent 4ec0d9c1b7
commit c00d81e697
18 changed files with 179 additions and 89 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
llvm/include/llvm/AsmParser/Parser.h
View File

@ -39,9 +39,11 @@ class Type;
/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
/// This option should only be set to false by llvm-as
/// for use inside the LLVM testuite!
/// \param DataLayoutString Override datalayout in the llvm assembly.
std::unique_ptr<Module>
parseAssemblyFile(StringRef Filename, SMDiagnostic &Error, LLVMContext &Context,
SlotMapping *Slots = nullptr, bool UpgradeDebugInfo = true);
SlotMapping *Slots = nullptr, bool UpgradeDebugInfo = true,
StringRef DataLayoutString = "");
/// The function is a secondary interface to the LLVM Assembly Parser. It parses
/// an ASCII string that (presumably) contains LLVM Assembly code. It returns a
@ -57,11 +59,13 @@ parseAssemblyFile(StringRef Filename, SMDiagnostic &Error, LLVMContext &Context,
/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
/// This option should only be set to false by llvm-as
/// for use inside the LLVM testuite!
/// \param DataLayoutString Override datalayout in the llvm assembly.
std::unique_ptr<Module> parseAssemblyString(StringRef AsmString,
SMDiagnostic &Error,
LLVMContext &Context,
SlotMapping *Slots = nullptr,
bool UpgradeDebugInfo = true);
bool UpgradeDebugInfo = true,
StringRef DataLayoutString = "");
/// parseAssemblyFile and parseAssemblyString are wrappers around this function.
/// \brief Parse LLVM Assembly from a MemoryBuffer.
@ -72,10 +76,12 @@ std::unique_ptr<Module> parseAssemblyString(StringRef AsmString,
/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
/// This option should only be set to false by llvm-as
/// for use inside the LLVM testuite!
/// \param DataLayoutString Override datalayout in the llvm assembly.
std::unique_ptr<Module> parseAssembly(MemoryBufferRef F, SMDiagnostic &Err,
LLVMContext &Context,
SlotMapping *Slots = nullptr,
bool UpgradeDebugInfo = true);
bool UpgradeDebugInfo = true,
StringRef DataLayoutString = "");
/// This function is the low-level interface to the LLVM Assembly Parser.
/// This is kept as an independent function instead of being inlined into
@ -91,9 +97,11 @@ std::unique_ptr<Module> parseAssembly(MemoryBufferRef F, SMDiagnostic &Err,
/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
/// This option should only be set to false by llvm-as
/// for use inside the LLVM testuite!
/// \param DataLayoutString Override datalayout in the llvm assembly.
bool parseAssemblyInto(MemoryBufferRef F, Module &M, SMDiagnostic &Err,
SlotMapping *Slots = nullptr,
bool UpgradeDebugInfo = true);
bool UpgradeDebugInfo = true,
StringRef DataLayoutString = "");
/// Parse a type and a constant value in the given string.
///

9
llvm/include/llvm/IRReader/IRReader.h
View File

@ -15,6 +15,7 @@
#ifndef LLVM_IRREADER_IRREADER_H
#define LLVM_IRREADER_IRREADER_H
#include "llvm/ADT/StringRef.h"
#include <memory>
namespace llvm {
@ -40,9 +41,11 @@ getLazyIRFileModule(StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
/// This option should only be set to false by llvm-as
/// for use inside the LLVM testuite!
/// \param DataLayoutString Override datalayout in the llvm assembly.
std::unique_ptr<Module> parseIR(MemoryBufferRef Buffer, SMDiagnostic &Err,
LLVMContext &Context,
bool UpgradeDebugInfo = true);
bool UpgradeDebugInfo = true,
StringRef DataLayoutString = "");
/// If the given file holds a bitcode image, return a Module for it.
/// Otherwise, attempt to parse it as LLVM Assembly and return a Module
@ -50,9 +53,11 @@ std::unique_ptr<Module> parseIR(MemoryBufferRef Buffer, SMDiagnostic &Err,
/// \param UpgradeDebugInfo Run UpgradeDebugInfo, which runs the Verifier.
/// This option should only be set to false by llvm-as
/// for use inside the LLVM testuite!
/// \param DataLayoutString Override datalayout in the llvm assembly.
std::unique_ptr<Module> parseIRFile(StringRef Filename, SMDiagnostic &Err,
LLVMContext &Context,
bool UpgradeDebugInfo = true);
bool UpgradeDebugInfo = true,
StringRef DataLayoutString = "");
}
#endif

12
llvm/lib/AsmParser/LLParser.cpp
View File

@ -327,7 +327,8 @@ bool LLParser::ParseTargetDefinition() {
if (ParseToken(lltok::equal, "expected '=' after target datalayout") ||
ParseStringConstant(Str))
return true;
M->setDataLayout(Str);
if (DataLayoutStr.empty())
M->setDataLayout(Str);
return false;
}
}
@ -6261,14 +6262,7 @@ int LLParser::ParseAlloc(Instruction *&Inst, PerFunctionState &PFS) {
if (Size && !Size->getType()->isIntegerTy())
return Error(SizeLoc, "element count must have integer type");
const DataLayout &DL = M->getDataLayout();
unsigned AS = DL.getAllocaAddrSpace();
if (AS != AddrSpace) {
// TODO: In the future it should be possible to specify addrspace per-alloca.
return Error(ASLoc, "address space must match datalayout");
}
AllocaInst *AI = new AllocaInst(Ty, AS, Size, Alignment);
AllocaInst *AI = new AllocaInst(Ty, AddrSpace, Size, Alignment);
AI->setUsedWithInAlloca(IsInAlloca);
AI->setSwiftError(IsSwiftError);
Inst = AI;

11
llvm/lib/AsmParser/LLParser.h
View File

@ -143,12 +143,19 @@ namespace llvm {
/// UpgradeDebuginfo so it can generate broken bitcode.
bool UpgradeDebugInfo;
/// DataLayout string to override that in LLVM assembly.
StringRef DataLayoutStr;
public:
LLParser(StringRef F, SourceMgr &SM, SMDiagnostic &Err, Module *M,
SlotMapping *Slots = nullptr, bool UpgradeDebugInfo = true)
SlotMapping *Slots = nullptr, bool UpgradeDebugInfo = true,
StringRef DataLayoutString = "")
: Context(M->getContext()), Lex(F, SM, Err, M->getContext()), M(M),
Slots(Slots), BlockAddressPFS(nullptr),
UpgradeDebugInfo(UpgradeDebugInfo) {}
UpgradeDebugInfo(UpgradeDebugInfo), DataLayoutStr(DataLayoutString) {
if (!DataLayoutStr.empty())
M->setDataLayout(DataLayoutStr);
}
bool Run();
bool parseStandaloneConstantValue(Constant *&C, const SlotMapping *Slots);

35
llvm/lib/AsmParser/Parser.cpp
View File

@ -23,31 +23,34 @@
using namespace llvm;
bool llvm::parseAssemblyInto(MemoryBufferRef F, Module &M, SMDiagnostic &Err,
SlotMapping *Slots, bool UpgradeDebugInfo) {
SlotMapping *Slots, bool UpgradeDebugInfo,
StringRef DataLayoutString) {
SourceMgr SM;
std::unique_ptr<MemoryBuffer> Buf = MemoryBuffer::getMemBuffer(F);
SM.AddNewSourceBuffer(std::move(Buf), SMLoc());
return LLParser(F.getBuffer(), SM, Err, &M, Slots, UpgradeDebugInfo).Run();
return LLParser(F.getBuffer(), SM, Err, &M, Slots, UpgradeDebugInfo,
DataLayoutString)
.Run();
}
std::unique_ptr<Module>
llvm::parseAssembly(MemoryBufferRef F, SMDiagnostic &Err, LLVMContext &Context,
SlotMapping *Slots, bool UpgradeDebugInfo) {
SlotMapping *Slots, bool UpgradeDebugInfo,
StringRef DataLayoutString) {
std::unique_ptr<Module> M =
make_unique<Module>(F.getBufferIdentifier(), Context);
if (parseAssemblyInto(F, *M, Err, Slots, UpgradeDebugInfo))
if (parseAssemblyInto(F, *M, Err, Slots, UpgradeDebugInfo, DataLayoutString))
return nullptr;
return M;
}
std::unique_ptr<Module> llvm::parseAssemblyFile(StringRef Filename,
SMDiagnostic &Err,
LLVMContext &Context,
SlotMapping *Slots,
bool UpgradeDebugInfo) {
std::unique_ptr<Module>
llvm::parseAssemblyFile(StringRef Filename, SMDiagnostic &Err,
LLVMContext &Context, SlotMapping *Slots,
bool UpgradeDebugInfo, StringRef DataLayoutString) {
ErrorOr<std::unique_ptr<MemoryBuffer>> FileOrErr =
MemoryBuffer::getFileOrSTDIN(Filename);
if (std::error_code EC = FileOrErr.getError()) {
@ -57,16 +60,16 @@ std::unique_ptr<Module> llvm::parseAssemblyFile(StringRef Filename,
}
return parseAssembly(FileOrErr.get()->getMemBufferRef(), Err, Context, Slots,
UpgradeDebugInfo);
UpgradeDebugInfo, DataLayoutString);
}
std::unique_ptr<Module> llvm::parseAssemblyString(StringRef AsmString,
SMDiagnostic &Err,
LLVMContext &Context,
SlotMapping *Slots,
bool UpgradeDebugInfo) {
std::unique_ptr<Module>
llvm::parseAssemblyString(StringRef AsmString, SMDiagnostic &Err,
LLVMContext &Context, SlotMapping *Slots,
bool UpgradeDebugInfo, StringRef DataLayoutString) {
MemoryBufferRef F(AsmString, "<string>");
return parseAssembly(F, Err, Context, Slots, UpgradeDebugInfo);
return parseAssembly(F, Err, Context, Slots, UpgradeDebugInfo,
DataLayoutString);
}
Constant *llvm::parseConstantValue(StringRef Asm, SMDiagnostic &Err,

2
llvm/lib/CodeGen/MIRParser/MIRParser.cpp
View File

@ -237,7 +237,7 @@ std::unique_ptr<Module> MIRParserImpl::parseIRModule() {
dyn_cast_or_null<yaml::BlockScalarNode>(In.getCurrentNode())) {
SMDiagnostic Error;
M = parseAssembly(MemoryBufferRef(BSN->getValue(), Filename), Error,
Context, &IRSlots);
Context, &IRSlots, /*UpgradeDebugInfo=*/false);
if (!M) {
reportDiagnostic(diagFromBlockStringDiag(Error, BSN->getSourceRange()));
return nullptr;

13
llvm/lib/IRReader/IRReader.cpp
View File

@ -68,7 +68,8 @@ std::unique_ptr<Module> llvm::getLazyIRFileModule(StringRef Filename,
std::unique_ptr<Module> llvm::parseIR(MemoryBufferRef Buffer, SMDiagnostic &Err,
LLVMContext &Context,
bool UpgradeDebugInfo) {
bool UpgradeDebugInfo,
StringRef DataLayoutString) {
NamedRegionTimer T(TimeIRParsingName, TimeIRParsingDescription,
TimeIRParsingGroupName, TimeIRParsingGroupDescription,
TimePassesIsEnabled);
@ -83,15 +84,19 @@ std::unique_ptr<Module> llvm::parseIR(MemoryBufferRef Buffer, SMDiagnostic &Err,
});
return nullptr;
}
if (!DataLayoutString.empty())
ModuleOrErr.get()->setDataLayout(DataLayoutString);
return std::move(ModuleOrErr.get());
}
return parseAssembly(Buffer, Err, Context, nullptr, UpgradeDebugInfo);
return parseAssembly(Buffer, Err, Context, nullptr, UpgradeDebugInfo,
DataLayoutString);
}
std::unique_ptr<Module> llvm::parseIRFile(StringRef Filename, SMDiagnostic &Err,
LLVMContext &Context,
bool UpgradeDebugInfo) {
bool UpgradeDebugInfo,
StringRef DataLayoutString) {
ErrorOr<std::unique_ptr<MemoryBuffer>> FileOrErr =
MemoryBuffer::getFileOrSTDIN(Filename);
if (std::error_code EC = FileOrErr.getError()) {
@ -101,7 +106,7 @@ std::unique_ptr<Module> llvm::parseIRFile(StringRef Filename, SMDiagnostic &Err,
}
return parseIR(FileOrErr.get()->getMemBufferRef(), Err, Context,
UpgradeDebugInfo);
UpgradeDebugInfo, DataLayoutString);
}
//===----------------------------------------------------------------------===//

4
llvm/test/Assembler/datalayout-alloca-addrspace-mismatch-0.ll
View File

@ -2,7 +2,9 @@
target datalayout = "A1"
; CHECK: :7:41: error: address space must match datalayout
; CHECK: Allocation instruction pointer not in the stack address space!
; CHECK-NEXT: %alloca_scalar_no_align = alloca i32, addrspace(2)
define void @use_alloca() {
%alloca_scalar_no_align = alloca i32, addrspace(2)
ret void

4
llvm/test/Assembler/datalayout-alloca-addrspace-mismatch-1.ll
View File

@ -2,7 +2,9 @@
target datalayout = "A1"
; CHECK: :7:50: error: address space must match datalayout
; CHECK: Allocation instruction pointer not in the stack address space!
; CHECK-NEXT: %alloca_scalar_no_align = alloca i32, align 4, addrspace(2)
define void @use_alloca() {
%alloca_scalar_no_align = alloca i32, align 4, addrspace(2)
ret void

4
llvm/test/Assembler/datalayout-alloca-addrspace-mismatch-2.ll
View File

@ -2,7 +2,9 @@
target datalayout = "A1"
; CHECK: :7:50: error: address space must match datalayout
; CHECK: Allocation instruction pointer not in the stack address space!
; CHECK-NEXT: %alloca_scalar_no_align = alloca i32, align 4, addrspace(2), !foo !0
define void @use_alloca() {
%alloca_scalar_no_align = alloca i32, align 4, addrspace(2), !foo !0
ret void

25
llvm/test/Assembler/drop-debug-info-nonzero-alloca.ll Normal file
View File

@ -0,0 +1,25 @@
; RUN: llvm-as < %s -o %t.bc -data-layout=A5 2>&1 | FileCheck -check-prefixes=COM,AS %s
; RUN: llvm-dis < %t.bc | FileCheck -check-prefixes=COM,DIS %s
; RUN: opt < %s -S -data-layout=A5 2>&1 | FileCheck -check-prefixes=COM,AS %s
; RUN: opt < %t.bc -S | FileCheck -check-prefixes=COM,DIS %s
define void @foo() {
entry:
; DIS: target datalayout = "A5"
; DIS: %tmp = alloca i32, addrspace(5)
%tmp = alloca i32, addrspace(5)
call void @llvm.dbg.value(
metadata i8* undef,
metadata !DILocalVariable(scope: !1),
metadata !DIExpression())
; COM-NOT: Allocation instruction pointer not in the stack address space!
; AS: llvm.dbg.value intrinsic requires a !dbg attachment
; AS: warning: ignoring invalid debug info in <stdin>
ret void
}
declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.module.flags = !{!0}
!0 = !{i32 2, !"Debug Info Version", i32 3}
!1 = distinct !DISubprogram(name: "foo")

12
llvm/test/CodeGen/AMDGPU/alloca.ll Normal file
View File

@ -0,0 +1,12 @@
; RUN: llvm-as -data-layout=A5 < %s | llvm-dis | FileCheck %s
; RUN: llc -mtriple amdgcn-amd-amdhsa-amdgiz < %s
; RUN: llvm-as -data-layout=A5 < %s | llc -mtriple amdgcn-amd-amdhsa-amdgiz
; RUN: opt -data-layout=A5 -S < %s
; RUN: llvm-as -data-layout=A5 < %s | opt -S
; CHECK: %tmp = alloca i32, addrspace(5)
define amdgpu_kernel void @test() {
%tmp = alloca i32, addrspace(5)
ret void
}

35
llvm/test/CodeGen/AMDGPU/fence-barrier.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -enable-si-insert-waitcnts=1 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -enable-si-insert-waitcnts=1 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
; RUN: llvm-as -data-layout=A5 < %s | llc -mtriple=amdgcn-amd-amdhsa-amdgiz -mcpu=gfx803 -enable-si-insert-waitcnts=1 -verify-machineinstrs | FileCheck --check-prefix=GCN %s
declare i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
declare i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
@ -16,8 +17,8 @@ declare void @llvm.amdgcn.s.barrier()
; GCN-NEXT: s_barrier
; GCN: flat_store_dword
define amdgpu_kernel void @test_local(i32 addrspace(1)*) {
%2 = alloca i32 addrspace(1)*, align 4
store i32 addrspace(1)* %0, i32 addrspace(1)** %2, align 4
%2 = alloca i32 addrspace(1)*, align 4, addrspace(5)
store i32 addrspace(1)* %0, i32 addrspace(1)* addrspace(5)* %2, align 4
%3 = call i32 @llvm.amdgcn.workitem.id.x()
%4 = zext i32 %3 to i64
%5 = icmp eq i64 %4, 0
@ -32,7 +33,7 @@ define amdgpu_kernel void @test_local(i32 addrspace(1)*) {
call void @llvm.amdgcn.s.barrier()
fence syncscope("workgroup") acquire
%8 = load i32, i32 addrspace(3)* getelementptr inbounds ([1 x i32], [1 x i32] addrspace(3)* @test_local.temp, i64 0, i64 0), align 4
%9 = load i32 addrspace(1)*, i32 addrspace(1)** %2, align 4
%9 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(5)* %2, align 4
%10 = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
%11 = call i32 @llvm.amdgcn.workitem.id.x()
%12 = call i32 @llvm.amdgcn.workgroup.id.x()
@ -58,14 +59,14 @@ define amdgpu_kernel void @test_local(i32 addrspace(1)*) {
; GCN: s_waitcnt vmcnt(0) lgkmcnt(0){{$}}
; GCN-NEXT: s_barrier
define amdgpu_kernel void @test_global(i32 addrspace(1)*) {
%2 = alloca i32 addrspace(1)*, align 4
%3 = alloca i32, align 4
store i32 addrspace(1)* %0, i32 addrspace(1)** %2, align 4
store i32 0, i32* %3, align 4
%2 = alloca i32 addrspace(1)*, align 4, addrspace(5)
%3 = alloca i32, align 4, addrspace(5)
store i32 addrspace(1)* %0, i32 addrspace(1)* addrspace(5)* %2, align 4
store i32 0, i32 addrspace(5)* %3, align 4
br label %4
; <label>:4: ; preds = %58, %1
%5 = load i32, i32* %3, align 4
%5 = load i32, i32 addrspace(5)* %3, align 4
%6 = sext i32 %5 to i64
%7 = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
%8 = call i32 @llvm.amdgcn.workitem.id.x()
@ -101,8 +102,8 @@ define amdgpu_kernel void @test_global(i32 addrspace(1)*) {
%36 = add i64 %35, %33
%37 = add i64 %36, 2184
%38 = trunc i64 %37 to i32
%39 = load i32 addrspace(1)*, i32 addrspace(1)** %2, align 4
%40 = load i32, i32* %3, align 4
%39 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(5)* %2, align 4
%40 = load i32, i32 addrspace(5)* %3, align 4
%41 = sext i32 %40 to i64
%42 = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
%43 = call i32 @llvm.amdgcn.workitem.id.x()
@ -127,9 +128,9 @@ define amdgpu_kernel void @test_global(i32 addrspace(1)*) {
br label %58
; <label>:58: ; preds = %22
%59 = load i32, i32* %3, align 4
%59 = load i32, i32 addrspace(5)* %3, align 4
%60 = add nsw i32 %59, 1
store i32 %60, i32* %3, align 4
store i32 %60, i32 addrspace(5)* %3, align 4
br label %4
; <label>:61: ; preds = %4
@ -143,9 +144,9 @@ define amdgpu_kernel void @test_global(i32 addrspace(1)*) {
; GCN-NEXT: s_barrier
; GCN: flat_store_dword
define amdgpu_kernel void @test_global_local(i32 addrspace(1)*) {
%2 = alloca i32 addrspace(1)*, align 4
store i32 addrspace(1)* %0, i32 addrspace(1)** %2, align 4
%3 = load i32 addrspace(1)*, i32 addrspace(1)** %2, align 4
%2 = alloca i32 addrspace(1)*, align 4, addrspace(5)
store i32 addrspace(1)* %0, i32 addrspace(1)* addrspace(5)* %2, align 4
%3 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(5)* %2, align 4
%4 = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
%5 = call i32 @llvm.amdgcn.workitem.id.x()
%6 = call i32 @llvm.amdgcn.workgroup.id.x()
@ -176,7 +177,7 @@ define amdgpu_kernel void @test_global_local(i32 addrspace(1)*) {
call void @llvm.amdgcn.s.barrier()
fence syncscope("workgroup") acquire
%24 = load i32, i32 addrspace(3)* getelementptr inbounds ([1 x i32], [1 x i32] addrspace(3)* @test_global_local.temp, i64 0, i64 0), align 4
%25 = load i32 addrspace(1)*, i32 addrspace(1)** %2, align 4
%25 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(5)* %2, align 4
%26 = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
%27 = call i32 @llvm.amdgcn.workitem.id.x()
%28 = call i32 @llvm.amdgcn.workgroup.id.x()

16
llvm/test/CodeGen/AMDGPU/invalid-alloca.ll Normal file
View File

@ -0,0 +1,16 @@
; RUN: not llvm-as -data-layout=A5 < %s 2>&1 | FileCheck -check-prefixes=COMMON,AS %s
; RUN: not llc -mtriple amdgcn-amd-amdhsa-amdgiz < %s 2>&1 | FileCheck -check-prefixes=COMMON,LLC %s
; RUN: llvm-as < %s | not llc -mtriple amdgcn-amd-amdhsa-amdgiz 2>&1 | FileCheck -check-prefixes=COMMON,LLC %s
; RUN: not opt -data-layout=A5 -S < %s 2>&1 | FileCheck -check-prefixes=COMMON,LLC %s
; RUN: llvm-as < %s | not opt -data-layout=A5 2>&1 | FileCheck -check-prefixes=COMMON,LLC %s
; AS: assembly parsed, but does not verify as correct!
; COMMON: Allocation instruction pointer not in the stack address space!
; COMMON: %tmp = alloca i32
; LLC: error: input module is broken!
define amdgpu_kernel void @test() {
%tmp = alloca i32
ret void
}

26
llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
View File

@ -1,4 +1,4 @@
# RUN: llc -mtriple=amdgcn-amd-amdhsa-opencl -verify-machineinstrs -run-pass=machine-scheduler -o - %s | FileCheck %s
# RUN: llc -mtriple=amdgcn-amd-amdhsa-amdgizcl -verify-machineinstrs -run-pass=machine-scheduler -o - %s | FileCheck %s
--- |
%struct.widget.0 = type { float, i32, i32 }
@ -14,7 +14,7 @@
define amdgpu_kernel void @sched_dbg_value_crash(i8 addrspace(1)* nocapture readonly %arg, i32 addrspace(1)* nocapture readonly %arg1, %struct.widget.0 addrspace(1)* nocapture readonly %arg2, %struct.baz addrspace(1)* nocapture readonly %arg3, %struct.snork addrspace(1)* nocapture %arg4) local_unnamed_addr #2 {
bb:
%0 = getelementptr i32, i32 addrspace(1)* %arg1, i64 0, !amdgpu.uniform !3, !amdgpu.noclobber !3
%tmp5 = alloca %struct.wombat, align 16
%tmp5 = alloca %struct.wombat, align 16, addrspace(5)
%1 = call noalias nonnull dereferenceable(64) i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
%2 = bitcast i8 addrspace(2)* %1 to i32 addrspace(2)*
%3 = getelementptr inbounds i32, i32 addrspace(2)* %2, i64 1
@ -48,9 +48,9 @@
%tmp20 = shl nuw nsw i64 %tmp19, 2
%tmp21 = getelementptr inbounds i8, i8 addrspace(1)* %arg, i64 %tmp20
%tmp22 = bitcast i8 addrspace(1)* %tmp21 to %struct.wombat.1 addrspace(1)*
%tmp23 = bitcast %struct.wombat* %tmp5 to i8*
call void @llvm.lifetime.start.p0i8(i64 144, i8* nonnull %tmp23) #3
%tmp24 = getelementptr inbounds %struct.wombat, %struct.wombat* %tmp5, i32 0, i32 6
%tmp23 = bitcast %struct.wombat addrspace(5)* %tmp5 to i8 addrspace(5)*
call void @llvm.lifetime.start.p5i8(i64 144, i8 addrspace(5)* nonnull %tmp23) #3
%tmp24 = getelementptr inbounds %struct.wombat, %struct.wombat addrspace(5)* %tmp5, i32 0, i32 6
%tmp25 = getelementptr i32, i32 addrspace(1)* %arg1, i64 3, !amdgpu.uniform !3, !amdgpu.noclobber !3
%tmp26 = load i32, i32 addrspace(1)* %tmp25, align 4
%tmp27 = zext i32 %tmp26 to i64
@ -103,7 +103,7 @@
%tmp74 = insertelement <4 x float> <float undef, float undef, float undef, float 0.000000e+00>, float %tmp69, i32 0
%tmp75 = insertelement <4 x float> %tmp74, float %tmp71, i32 1
%tmp76 = insertelement <4 x float> %tmp75, float %tmp73, i32 2
store <4 x float> %tmp76, <4 x float>* %tmp24, align 16
store <4 x float> %tmp76, <4 x float> addrspace(5)* %tmp24, align 16
%tmp77 = fsub float undef, %tmp60
%tmp78 = fsub float undef, %tmp61
%tmp79 = extractelement <4 x float> %tmp66, i32 2
@ -125,26 +125,26 @@
%tmp94 = call float @llvm.fmuladd.f32(float %tmp92, float %tmp36, float %tmp93)
%tmp95 = call float @llvm.fmuladd.f32(float %tmp48, float undef, float %tmp94)
%tmp96 = fsub float extractelement (<2 x float> fadd (<2 x float> fmul (<2 x float> undef, <2 x float> undef), <2 x float> undef), i64 1), %tmp95
%tmp97 = getelementptr inbounds %struct.wombat, %struct.wombat* %tmp5, i32 0, i32 8, i32 1
call void @func(float %tmp96, i64 0, i16* nonnull %tmp97) #3
%tmp97 = getelementptr inbounds %struct.wombat, %struct.wombat addrspace(5)* %tmp5, i32 0, i32 8, i32 1
call void @func(float %tmp96, i64 0, i16 addrspace(5)* nonnull %tmp97) #3
%tmp984 = bitcast [16 x i8] addrspace(3)* %17 to i8 addrspace(3)*
%tmp99 = getelementptr inbounds %struct.snork, %struct.snork addrspace(1)* %arg4, i64 %tmp12, i32 8, i32 1, i64 0
call void @llvm.memcpy.p1i8.p3i8.i64(i8 addrspace(1)* %tmp99, i8 addrspace(3)* %tmp984, i64 16, i32 16, i1 false)
call void @llvm.lifetime.end.p0i8(i64 144, i8* nonnull %tmp23) #3
call void @llvm.lifetime.end.p5i8(i64 144, i8 addrspace(5)* nonnull %tmp23) #3
ret void
}
declare void @func(float, i64, i16*)
declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #0
declare void @func(float, i64, i16 addrspace(5)*)
declare void @llvm.lifetime.start.p5i8(i64, i8 addrspace(5)* nocapture) #0
declare float @llvm.fmuladd.f32(float, float, float) #1
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #0
declare void @llvm.lifetime.end.p5i8(i64, i8 addrspace(5)* nocapture) #0
declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) #1
declare i32 @llvm.amdgcn.workitem.id.x() #1
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
declare i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() #1
declare i32 @llvm.amdgcn.workitem.id.y() #1
declare i32 @llvm.amdgcn.workitem.id.z() #1
declare void @llvm.memcpy.p1i8.p0i8.i64(i8 addrspace(1)* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) #0
declare void @llvm.memcpy.p1i8.p5i8.i64(i8 addrspace(1)* nocapture writeonly, i8 addrspace(5)* nocapture readonly, i64, i32, i1) #0
declare void @llvm.memcpy.p1i8.p3i8.i64(i8 addrspace(1)* nocapture writeonly, i8 addrspace(3)* nocapture readonly, i64, i32, i1) #0
attributes #0 = { argmemonly nounwind }

23
llvm/tools/llc/llc.cpp
View File

@ -24,6 +24,7 @@
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/AutoUpgrade.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/DiagnosticPrinter.h"
@ -395,20 +396,12 @@ static int compileModule(char **argv, LLVMContext &Context) {
if (MIR)
M = MIR->parseIRModule();
} else
M = parseIRFile(InputFilename, Err, Context);
M = parseIRFile(InputFilename, Err, Context, false);
if (!M) {
Err.print(argv[0], errs());
return 1;
}
// Verify module immediately to catch problems before doInitialization() is
// called on any passes.
if (!NoVerify && verifyModule(*M, &errs())) {
errs() << argv[0] << ": " << InputFilename
<< ": error: input module is broken!\n";
return 1;
}
// If we are supposed to override the target triple, do so now.
if (!TargetTriple.empty())
M->setTargetTriple(Triple::normalize(TargetTriple));
@ -487,6 +480,18 @@ static int compileModule(char **argv, LLVMContext &Context) {
// Add the target data from the target machine, if it exists, or the module.
M->setDataLayout(Target->createDataLayout());
// This needs to be done after setting datalayout since it calls verifier
// to check debug info whereas verifier relies on correct datalayout.
UpgradeDebugInfo(*M);
// Verify module immediately to catch problems before doInitialization() is
// called on any passes.
if (!NoVerify && verifyModule(*M, &errs())) {
errs() << argv[0] << ": " << InputFilename
<< ": error: input module is broken!\n";
return 1;
}
// Override function attributes based on CPUStr, FeaturesStr, and command line
// flags.
setFunctionAttributes(CPUStr, FeaturesStr, *M);

9
llvm/tools/llvm-as/llvm-as.cpp
View File

@ -59,6 +59,11 @@ static cl::opt<bool> PreserveBitcodeUseListOrder(
cl::desc("Preserve use-list order when writing LLVM bitcode."),
cl::init(true), cl::Hidden);
static cl::opt<std::string> ClDataLayout("data-layout",
cl::desc("data layout string to use"),
cl::value_desc("layout-string"),
cl::init(""));
static void WriteOutputFile(const Module *M) {
// Infer the output filename if needed.
if (OutputFilename.empty()) {
@ -97,8 +102,8 @@ int main(int argc, char **argv) {
// Parse the file now...
SMDiagnostic Err;
std::unique_ptr<Module> M =
parseAssemblyFile(InputFilename, Err, Context, nullptr, !DisableVerify);
std::unique_ptr<Module> M = parseAssemblyFile(
InputFilename, Err, Context, nullptr, !DisableVerify, ClDataLayout);
if (!M.get()) {
Err.print(argv[0], errs());
return 1;

12
llvm/tools/opt/opt.cpp
View File

@ -458,7 +458,7 @@ int main(int argc, char **argv) {
// Load the input module...
std::unique_ptr<Module> M =
parseIRFile(InputFilename, Err, Context, !NoVerify);
parseIRFile(InputFilename, Err, Context, !NoVerify, ClDataLayout);
if (!M) {
Err.print(argv[0], errs());
@ -469,6 +469,10 @@ int main(int argc, char **argv) {
if (StripDebug)
StripDebugInfo(*M);
// If we are supposed to override the target triple or data layout, do so now.
if (!TargetTriple.empty())
M->setTargetTriple(Triple::normalize(TargetTriple));
// Immediately run the verifier to catch any problems before starting up the
// pass pipelines. Otherwise we can crash on broken code during
// doInitialization().
@ -478,12 +482,6 @@ int main(int argc, char **argv) {
return 1;
}
// If we are supposed to override the target triple or data layout, do so now.
if (!TargetTriple.empty())
M->setTargetTriple(Triple::normalize(TargetTriple));
if (!ClDataLayout.empty())
M->setDataLayout(ClDataLayout);
// Figure out what stream we are supposed to write to...
std::unique_ptr<ToolOutputFile> Out;
std::unique_ptr<ToolOutputFile> ThinLinkOut;