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[MC][ARM] vscclrm disassembles as vldmia 

Happens only when the mve.fp subtarget feature is enabled:

$ llvm-mc -triple thumbv8.1m.main -mattr=+mve.fp,+8msecext -disassemble <<< "0x9f,0xec,0x08,0x0b"
  .text
  vldmia  pc, {d0, d1, d2, d3}
$ llvm-mc -triple thumbv8.1m.main -mattr=+8msecext -disassemble <<< "0x9f,0xec,0x08,0x0b"
  .text
  vscclrm {d0, d1, d2, d3, vpr}

Assembling returns the correct encoding with or without mve.fp:

$ llvm-mc -triple thumbv8.1m.main -mattr=+mve.fp,+8msecext -show-encoding <<< "vscclrm {d0-d3, vpr}"
  .text
  vscclrm {d0, d1, d2, d3, vpr}   @ encoding: [0x9f,0xec,0x08,0x0b]
$ llvm-mc -triple thumbv8.1m.main -mattr=+8msecext -show-encoding <<< "vscclrm {d0-d3, vpr}"
  .text
  vscclrm {d0, d1, d2, d3, vpr}   @ encoding: [0x9f,0xec,0x08,0x0b]

The problem seems to be in the TableGen description of VSCCLRMD.
The least significant bit should be set to zero.

Differential Revision: https://reviews.llvm.org/D68025

llvm-svn: 373052
This commit is contained in:
Alexandros Lamprineas 2019-09-27 08:22:24 +00:00
parent a8d04651ce
commit c006b6f4cb
3 changed files with 12 additions and 2 deletions
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3
llvm/lib/Target/ARM/ARMInstrVFP.td
View File

@ -2618,7 +2618,8 @@ def VSCCLRMD : VFPXI<(outs), (ins pred:$p, fp_dreglist_with_vpr:$regs, variable_
let Inst{21-16} = 0b011111;
let Inst{15-12} = regs{11-8};
let Inst{11-8} = 0b1011;
let Inst{7-0} = regs{7-0};
let Inst{7-1} = regs{7-1};
let Inst{0} = 0;
let DecoderMethod = "DecodeVSCCLRM";

6
llvm/test/MC/ARM/vscclrm-asm.s
View File

@ -1,6 +1,9 @@
// RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+8msecext -show-encoding < %s 2>%t \
// RUN: | FileCheck --check-prefix=CHECK %s
// RUN: FileCheck --check-prefix=ERROR < %t %s
// RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+8msecext -show-encoding < %s 2>%t \
// RUN: | FileCheck --check-prefix=CHECK %s
// RUN: FileCheck --check-prefix=ERROR < %t %s
// RUN: not llvm-mc -triple=thumbv8.1m.main-arm-none-eabi -mattr=-8msecext < %s 2>%t
// RUN: FileCheck --check-prefix=NOSEC < %t %s
@ -21,6 +24,9 @@ vscclrm {s31, vpr}
// CHECK: vscclrm {d0, d1, vpr} @ encoding: [0x9f,0xec,0x04,0x0b]
vscclrm {d0-d1, vpr}
// CHECK: vscclrm {d0, d1, d2, d3, vpr} @ encoding: [0x9f,0xec,0x08,0x0b]
vscclrm {d0-d3, vpr}
// CHECK: vscclrm {d5, d6, d7, vpr} @ encoding: [0x9f,0xec,0x06,0x5b]
vscclrm {d5-d7, vpr}

5
llvm/test/MC/Disassembler/ARM/vscclrm.txt
View File

@ -1,5 +1,5 @@
# RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+8msecext -show-encoding %s 2>&1 | FileCheck %s
# RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+8msecext -show-encoding %s 2>&1 | FileCheck %s
[0x9f 0xec 0x04 0x0a]
# CHECK: vscclrm {s0, s1, s2, s3, vpr}
@ -16,6 +16,9 @@
[0x9f,0xec,0x04,0x0b]
# CHECK: vscclrm {d0, d1, vpr} @ encoding: [0x9f,0xec,0x04,0x0b]
[0x9f,0xec,0x08,0x0b]
# CHECK: vscclrm {d0, d1, d2, d3, vpr} @ encoding: [0x9f,0xec,0x08,0x0b]
[0x9f,0xec,0x06,0x5b]
# CHECK: vscclrm {d5, d6, d7, vpr} @ encoding: [0x9f,0xec,0x06,0x5b]