forked from OSchip/llvm-project
[ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP
The Cortex-M7 has 3 options for its FPU: none, FPv5-SP-D16 and FPv5-DP-D16. FPv5 has the same instructions as FP-ARMv8, so it can be modeled using the same target feature, and all double-precision operations are already disabled by the fp-only-sp target features. llvm-svn: 218748
This commit is contained in:
Oliver Stannard
parent
37e4daab05
commit
bfd3ea32b7
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@ -3917,7 +3917,7 @@ public:
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ArchName == "thumbebv8a" || ArchName == "thumbebv8") {
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Features["hwdiv"] = true;
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Features["hwdiv-arm"] = true;
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} else if (CPU == "cortex-m3" || CPU == "cortex-m4") {
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} else if (CPU == "cortex-m3" || CPU == "cortex-m4" || CPU == "cortex-m7") {
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Features["hwdiv"] = true;
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}
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}
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@ -4017,7 +4017,7 @@ public:
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.Case("swift", "7S")
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.Case("cyclone", "8A")
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.Case("cortex-m3", "7M")
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.Case("cortex-m4", "7EM")
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.Cases("cortex-m4", "cortex-m7", "7EM")
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.Case("cortex-m0", "6M")
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.Cases("cortex-a53", "cortex-a57", "8A")
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.Default(nullptr);
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@ -4027,7 +4027,7 @@ public:
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.Cases("cortex-a5", "cortex-a7", "cortex-a8", "A")
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "krait", "A")
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.Cases("cortex-a53", "cortex-a57", "A")
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.Cases("cortex-m3", "cortex-m4", "cortex-m0", "M")
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.Cases("cortex-m3", "cortex-m4", "cortex-m0", "cortex-m7", "M")
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.Cases("cortex-r4", "cortex-r5", "R")
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.Default("");
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}
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@ -137,7 +137,7 @@ static const char *GetArmArchForMCpu(StringRef Value) {
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.Cases("cortex-a9", "cortex-a12", "cortex-a15", "krait", "armv7")
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.Cases("cortex-r4", "cortex-r5", "armv7r")
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.Case("cortex-m3", "armv7m")
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.Case("cortex-m4", "armv7em")
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.Cases("cortex-m4", "cortex-m7", "armv7em")
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.Case("swift", "armv7s")
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.Default(nullptr);
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}
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@ -544,6 +544,18 @@ static void getARMFPUFeatures(const Driver &D, const Arg *A,
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Features.push_back("+d16");
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Features.push_back("+fp-only-sp");
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Features.push_back("-neon");
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} else if (FPU == "fp5-sp-d16" || FPU == "fpv5-sp-d16") {
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Features.push_back("+fp-armv8");
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Features.push_back("+fp-only-sp");
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Features.push_back("+d16");
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Features.push_back("-neon");
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Features.push_back("-crypto");
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} else if (FPU == "fp5-dp-d16" || FPU == "fpv5-dp-d16" ||
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FPU == "fp5-d16" || FPU == "fpv5-d16") {
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Features.push_back("+fp-armv8");
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Features.push_back("+d16");
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Features.push_back("-neon");
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Features.push_back("-crypto");
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} else if (FPU == "fp-armv8") {
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Features.push_back("+fp-armv8");
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Features.push_back("-neon");
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@ -5340,7 +5352,7 @@ const char *arm::getLLVMArchSuffixForARM(StringRef CPU) {
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.Cases("cortex-r4", "cortex-r5", "v7r")
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.Case("cortex-m0", "v6m")
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.Case("cortex-m3", "v7m")
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.Case("cortex-m4", "v7em")
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.Cases("cortex-m4", "cortex-m7", "v7em")
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.Case("swift", "v7s")
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.Case("cyclone", "v8")
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.Cases("cortex-a53", "cortex-a57", "v8")
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@ -231,11 +231,15 @@
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// CHECK-BE-CPUV7M: "-cc1"{{.*}} "-triple" "thumbebv7m-{{.*}}
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7EM %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7EM %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m4 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7EM %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m7 -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7EM %s
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// CHECK-CPUV7EM: "-cc1"{{.*}} "-triple" "thumbv7em-{{.*}}
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-m4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7EM %s
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// RUN: %clang -target armeb-linux-gnueabi -mcpu=cortex-m7 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7EM %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m4 -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7EM %s
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-m7 -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-CPUV7EM %s
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// CHECK-BE-CPUV7EM: "-cc1"{{.*}} "-triple" "thumbebv7em-{{.*}}
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// RUN: %clang -target arm-linux-gnueabi -mcpu=cortex-r4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV7R %s
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@ -63,6 +63,25 @@
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// CHECK-FP4-SP-D16: "-target-feature" "+fp-only-sp"
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// CHECK-FP4-SP-D16: "-target-feature" "-neon"
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// RUN: %clang -target arm-linux-eabi -mfpu=fp5-sp-d16 %s -### -o %t.o 2>&1 \
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// RUN: | FileCheck --check-prefix=CHECK-FP5-SP-D16 %s
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// RUN: %clang -target arm-linux-eabi -mfpu=fpv5-sp-d16 %s -### -o %t.o 2>&1 \
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// RUN: | FileCheck --check-prefix=CHECK-FP5-SP-D16 %s
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// CHECK-FP5-SP-D16: "-target-feature" "+fp-armv8"
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// CHECK-FP5-SP-D16: "-target-feature" "+fp-only-sp"
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// CHECK-FP5-SP-D16: "-target-feature" "+d16"
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// CHECK-FP5-SP-D16: "-target-feature" "-neon"
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// CHECK-FP5-SP-D16: "-target-feature" "-crypto"
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// RUN: %clang -target arm-linux-eabi -mfpu=fp5-dp-d16 %s -### -o %t.o 2>&1 \
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// RUN: | FileCheck --check-prefix=CHECK-FP5-DP-D16 %s
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// RUN: %clang -target arm-linux-eabi -mfpu=fpv5-dp-d16 %s -### -o %t.o 2>&1 \
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// RUN: | FileCheck --check-prefix=CHECK-FP5-DP-D16 %s
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// CHECK-FP5-DP-D16: "-target-feature" "+fp-armv8"
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// CHECK-FP5-DP-D16: "-target-feature" "+d16"
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// CHECK-FP5-DP-D16: "-target-feature" "-neon"
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// CHECK-FP5-DP-D16: "-target-feature" "-crypto"
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// RUN: %clang -target arm-linux-eabi -mfpu=neon %s -### -o %t.o 2>&1 \
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// RUN: | FileCheck --check-prefix=CHECK-NEON %s
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// CHECK-NEON: "-target-feature" "+neon"
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@ -240,6 +240,10 @@
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// RUN: %clang -target armv7 -mthumb -mcpu=cortex-m4 -x c -E -dM %s -o - | FileCheck --check-prefix=M4-THUMB %s
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// M4-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1
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// Test whether predefines are as expected when targeting cortex-m7.
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// RUN: %clang -target armv7 -mthumb -mcpu=cortex-m7 -x c -E -dM %s -o - | FileCheck --check-prefix=M7-THUMB %s
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// M7-THUMB:#define __ARM_ARCH_EXT_IDIV__ 1
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// Test whether predefines are as expected when targeting krait.
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// RUN: %clang -target armv7 -mcpu=krait -x c -E -dM %s -o - | FileCheck --check-prefix=KRAIT-ARM %s
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// KRAIT-ARM:#define __ARM_ARCH_EXT_IDIV__ 1
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