forked from OSchip/llvm-project
parent
07df631129
commit
bfaab76f6b
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@ -243,7 +243,7 @@ bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
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// we must move it to the VALU, because the SGPR operands will
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// all end up being assigned the same register, which means
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// there is a potential for a conflict if different threads take
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// different control flow paths.
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// different control flow paths.
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//
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// For Example:
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//
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@ -305,8 +305,7 @@ bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
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!hasVGPROperands(MI, TRI))
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continue;
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DEBUG(dbgs() << "Fixing REG_SEQUENCE:\n");
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DEBUG(MI.print(dbgs()));
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DEBUG(dbgs() << "Fixing REG_SEQUENCE: " << MI);
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TII->moveToVALU(MI);
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break;
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@ -318,8 +317,7 @@ bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
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Src1RC = MRI.getRegClass(MI.getOperand(2).getReg());
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if (TRI->isSGPRClass(DstRC) &&
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(TRI->hasVGPRs(Src0RC) || TRI->hasVGPRs(Src1RC))) {
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DEBUG(dbgs() << " Fixing INSERT_SUBREG:\n");
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DEBUG(MI.print(dbgs()));
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DEBUG(dbgs() << " Fixing INSERT_SUBREG: " << MI);
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TII->moveToVALU(MI);
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}
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break;
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