Add XCore intrinsic for clre instruction.

llvm-svn: 126322

llvm/include/llvm/IntrinsicsXCore.td

@@ -50,4 +50,5 @@ let TargetPrefix = "xcore" in {  // All intrinsics start with "llvm.xcore.".
 
   // Intrinsics for events.
   def int_xcore_waitevent : Intrinsic<[llvm_ptr_ty],[], [IntrReadMem]>;
+  def int_xcore_clre : Intrinsic<[],[],[]>;
 }

llvm/lib/Target/XCore/XCoreInstrInfo.td

@@ -895,10 +895,12 @@ def SETV_1r : _F1R<(outs), (ins GRRegs:$r),
                [(int_xcore_setv GRRegs:$r, R11)]>;
 
 // Zero operand short
-// TODO clre, ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
+// TODO ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed,
 // stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret,
 // dentsp, drestsp
 
+def CLRE_0R : _F0R<(outs), (ins), "clre", [(int_xcore_clre)]>;
+
 let Defs = [R11] in
 def GETID_0R : _F0R<(outs), (ins),
                  "get r11, id",

llvm/test/CodeGen/XCore/events.ll

@@ -2,10 +2,13 @@
 
 declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
 declare i8* @llvm.xcore.waitevent()
+declare void @llvm.xcore.clre()
 
 define i32 @f(i8 addrspace(1)* %r) nounwind {
 ; CHECK: f:
 entry:
+; CHECK: clre
+  call void @llvm.xcore.clre()
   call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
   call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2))
   %goto_addr = call i8* @llvm.xcore.waitevent()