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[X86] Remove the default for one of the arguments to some tablegen multiclasses. NFC 

No one ever uses this default and probably shouldn't since it sets the execution domain to generic.

llvm-svn: 317967
This commit is contained in:
Craig Topper 2017-11-11 02:26:02 +00:00
parent 9f65a1ffc8
commit bf9b944ea7
1 changed files with 3 additions and 5 deletions
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8
llvm/lib/Target/X86/X86InstrSSE.td
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@ -386,8 +386,7 @@ let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
multiclass sse12_move_rr<SDNode OpNode, ValueType vt, multiclass sse12_move_rr<SDNode OpNode, ValueType vt,
X86MemOperand x86memop, string base_opc, X86MemOperand x86memop, string base_opc,
string asm_opr, Domain d = GenericDomain, string asm_opr, Domain d, string Name> {
string Name> {
let isCommutable = 1 in let isCommutable = 1 in
def rr : SI<0x10, MRMSrcReg, (outs VR128:$dst), def rr : SI<0x10, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2), (ins VR128:$src1, VR128:$src2),
@ -406,7 +405,7 @@ multiclass sse12_move_rr<SDNode OpNode, ValueType vt,
multiclass sse12_move<RegisterClass RC, SDNode OpNode, ValueType vt, multiclass sse12_move<RegisterClass RC, SDNode OpNode, ValueType vt,
X86MemOperand x86memop, string OpcodeStr, X86MemOperand x86memop, string OpcodeStr,
Domain d = GenericDomain, string Name> { Domain d, string Name> {
// AVX // AVX
defm V#NAME : sse12_move_rr<OpNode, vt, x86memop, OpcodeStr, defm V#NAME : sse12_move_rr<OpNode, vt, x86memop, OpcodeStr,
"\t{$src2, $src1, $dst|$dst, $src1, $src2}", d, "\t{$src2, $src1, $dst|$dst, $src1, $src2}", d,
@ -431,8 +430,7 @@ multiclass sse12_move<RegisterClass RC, SDNode OpNode, ValueType vt,
// Loading from memory automatically zeroing upper bits. // Loading from memory automatically zeroing upper bits.
multiclass sse12_move_rm<RegisterClass RC, X86MemOperand x86memop, multiclass sse12_move_rm<RegisterClass RC, X86MemOperand x86memop,
PatFrag mem_pat, string OpcodeStr, PatFrag mem_pat, string OpcodeStr, Domain d> {
Domain d = GenericDomain> {
def V#NAME#rm : SI<0x10, MRMSrcMem, (outs RC:$dst), (ins x86memop:$src), def V#NAME#rm : SI<0x10, MRMSrcMem, (outs RC:$dst), (ins x86memop:$src),
!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
[(set RC:$dst, (mem_pat addr:$src))], [(set RC:$dst, (mem_pat addr:$src))],