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[SLP][NFC]Add a test for the extra shuffle after alternate node, NFC.

This commit is contained in:
Alexey Bataev 2022-01-06 06:34:58 -08:00
parent bec726f5d2
commit bf5a688252
1 changed files with 37 additions and 0 deletions
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37
llvm/test/Transforms/SLPVectorizer/X86/vectorize-reordered-list.ll Normal file
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S --slp-vectorizer -mtriple=x86_64-unknown %s | FileCheck %s
define void @test(double* %isec) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds double, double* [[ISEC:%.*]], i64 1
; CHECK-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds double, double* [[ISEC]], i64 0
; CHECK-NEXT: [[TMP0:%.*]] = bitcast double* [[ARRAYIDX10]] to <2 x double>*
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* [[TMP0]], align 8
; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds double, double* [[ISEC]], i64 3
; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds double, double* [[ISEC]], i64 2
; CHECK-NEXT: [[TMP2:%.*]] = bitcast double* [[ARRAYIDX2]] to <2 x double>*
; CHECK-NEXT: [[TMP3:%.*]] = load <2 x double>, <2 x double>* [[TMP2]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP5:%.*]] = fsub <2 x double> [[TMP1]], [[TMP3]]
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x double> [[TMP4]], <2 x double> [[TMP5]], <2 x i32> <i32 2, i32 1>
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x double> [[TMP6]], <2 x double> poison, <2 x i32> <i32 1, i32 0>
; CHECK-NEXT: [[TMP7:%.*]] = bitcast double* [[ARRAYIDX10]] to <2 x double>*
; CHECK-NEXT: store <2 x double> [[SHUFFLE]], <2 x double>* [[TMP7]], align 8
; CHECK-NEXT: ret void
;
entry:
%arrayidx5 = getelementptr inbounds double, double* %isec, i64 1
%0 = load double, double* %arrayidx5, align 8
%arrayidx10 = getelementptr inbounds double, double* %isec, i64 0
%1 = load double, double* %arrayidx10, align 8
%arrayidx3 = getelementptr inbounds double, double* %isec, i64 3
%2 = load double, double* %arrayidx3, align 8
%arrayidx2 = getelementptr inbounds double, double* %isec, i64 2
%3 = load double, double* %arrayidx2, align 8
%4 = fadd double %0, %2
%5 = fsub double %1, %3
store double %4, double *%arrayidx10
store double %5, double *%arrayidx5
ret void
}