forked from OSchip/llvm-project
parent
dcfdce9067
commit
bf041366c4
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@ -588,8 +588,8 @@ ARMBaseInstrInfo::copyRegToReg(MachineBasicBlock &MBB,
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}
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}
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if (DestRC == ARM::GPRRegisterClass)
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if (DestRC == ARM::GPRRegisterClass)
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AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(getOpcode(ARMII::MOVr)), DestReg)
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AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(getOpcode(ARMII::MOVr)),
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.addReg(SrcReg)));
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DestReg).addReg(SrcReg)));
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else if (DestRC == ARM::SPRRegisterClass)
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else if (DestRC == ARM::SPRRegisterClass)
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AddDefaultPred(BuildMI(MBB, I, DL, get(getOpcode(ARMII::FCPYS)), DestReg)
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AddDefaultPred(BuildMI(MBB, I, DL, get(getOpcode(ARMII::FCPYS)), DestReg)
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.addReg(SrcReg));
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.addReg(SrcReg));
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