From bee4531bee0c1d9ce64ee80ce26ddd92c23b9ade Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Sat, 12 Feb 2022 17:30:57 +0100 Subject: [PATCH] [MachineSink] Inline getRegUnits Reg unit sets are uniqued, so no need to wrap it in a set. --- llvm/lib/CodeGen/MachineSink.cpp | 32 +++++++++++--------------------- 1 file changed, 11 insertions(+), 21 deletions(-) diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp index 0dbbc218e946..e584ebe88538 100644 --- a/llvm/lib/CodeGen/MachineSink.cpp +++ b/llvm/lib/CodeGen/MachineSink.cpp @@ -1081,8 +1081,7 @@ using MIRegs = std::pair>; /// Sink an instruction and its associated debug instructions. static void performSink(MachineInstr &MI, MachineBasicBlock &SuccToSinkTo, MachineBasicBlock::iterator InsertPos, - SmallVectorImpl &DbgValuesToSink) { - + ArrayRef DbgValuesToSink) { // If we cannot find a location to use (merge with), then we erase the debug // location to prevent debug-info driven tools from potentially reporting // wrong location information. @@ -1101,7 +1100,7 @@ static void performSink(MachineInstr &MI, MachineBasicBlock &SuccToSinkTo, // DBG_VALUE location as 'undef', indicating that any earlier variable // location should be terminated as we've optimised away the value at this // point. - for (auto DbgValueToSink : DbgValuesToSink) { + for (const auto &DbgValueToSink : DbgValuesToSink) { MachineInstr *DbgMI = DbgValueToSink.first; MachineInstr *NewDbgMI = DbgMI->getMF()->CloneMachineInstr(DbgMI); SuccToSinkTo.insert(InsertPos, NewDbgMI); @@ -1684,14 +1683,6 @@ static bool hasRegisterDependency(MachineInstr *MI, return HasRegDependency; } -static SmallSet getRegUnits(MCRegister Reg, - const TargetRegisterInfo *TRI) { - SmallSet RegUnits; - for (auto RI = MCRegUnitIterator(Reg, TRI); RI.isValid(); ++RI) - RegUnits.insert(*RI); - return RegUnits; -} - bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, MachineFunction &MF, const TargetRegisterInfo *TRI, @@ -1737,14 +1728,15 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, } // Record debug use of each reg unit. - SmallSet RegUnits = getRegUnits(MO.getReg(), TRI); - for (MCRegister Reg : RegUnits) - MIUnits[Reg].push_back(MO.getReg()); + for (auto RI = MCRegUnitIterator(MO.getReg(), TRI); RI.isValid(); + ++RI) + MIUnits[*RI].push_back(MO.getReg()); } } if (IsValid) { - for (auto RegOps : MIUnits) - SeenDbgInstrs[RegOps.first].push_back({&MI, RegOps.second}); + for (auto &RegOps : MIUnits) + SeenDbgInstrs[RegOps.first].emplace_back(&MI, + std::move(RegOps.second)); } continue; } @@ -1791,17 +1783,15 @@ bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, if (!MO.isReg() || !MO.isDef()) continue; - SmallSet Units = getRegUnits(MO.getReg(), TRI); - for (MCRegister Reg : Units) { - for (auto MIRegs : SeenDbgInstrs.lookup(Reg)) { + for (auto RI = MCRegUnitIterator(MO.getReg(), TRI); RI.isValid(); ++RI) { + for (const auto &MIRegs : SeenDbgInstrs.lookup(*RI)) { auto &Regs = DbgValsToSinkMap[MIRegs.first]; for (unsigned Reg : MIRegs.second) Regs.push_back(Reg); } } } - SmallVector DbgValsToSink(DbgValsToSinkMap.begin(), - DbgValsToSinkMap.end()); + auto DbgValsToSink = DbgValsToSinkMap.takeVector(); // Clear the kill flag if SrcReg is killed between MI and the end of the // block.