forked from OSchip/llvm-project
[OpenMP] Target directive host codegen.
This patch implements the outlining for offloading functions for code annotated with the OpenMP target directive. It uses a temporary naming of the outlined functions that will have to be updated later on once target side codegen and registration of offloading libraries is implemented - the naming needs to be made unique in the produced library. llvm-svn: 249148
This commit is contained in:
Samuel Antao
parent
77f62652c1
commit
bed3c46632
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@ -41,6 +41,8 @@ public:
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/// \brief Region for constructs that do not require function outlining,
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/// like 'for', 'sections', 'atomic' etc. directives.
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InlinedRegion,
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/// \brief Region with outlined function for standalone 'target' directive.
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TargetRegion,
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};
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CGOpenMPRegionInfo(const CapturedStmt &CS,
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@ -211,6 +213,29 @@ private:
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CGOpenMPRegionInfo *OuterRegionInfo;
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};
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/// \brief API for captured statement code generation in OpenMP target
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/// constructs. For this captures, implicit parameters are used instead of the
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/// captured fields.
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class CGOpenMPTargetRegionInfo : public CGOpenMPRegionInfo {
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public:
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CGOpenMPTargetRegionInfo(const CapturedStmt &CS,
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const RegionCodeGenTy &CodeGen)
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: CGOpenMPRegionInfo(CS, TargetRegion, CodeGen, OMPD_target,
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/*HasCancel = */ false) {}
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/// \brief This is unused for target regions because each starts executing
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/// with a single thread.
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const VarDecl *getThreadIDVariable() const override { return nullptr; }
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/// \brief Get the name of the capture helper.
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StringRef getHelperName() const override { return ".omp_offloading."; }
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static bool classof(const CGCapturedStmtInfo *Info) {
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return CGOpenMPRegionInfo::classof(Info) &&
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cast<CGOpenMPRegionInfo>(Info)->getRegionKind() == TargetRegion;
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}
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};
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/// \brief RAII for emitting code of OpenMP constructs.
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class InlinedOpenMPRegionRAII {
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CodeGenFunction &CGF;
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@ -877,6 +902,22 @@ CGOpenMPRuntime::createRuntimeFunction(OpenMPRTLFunction Function) {
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RTLFn = CGM.CreateRuntimeFunction(FnTy, "__kmpc_cancel");
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break;
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}
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case OMPRTL__tgt_target: {
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// Build int32_t __tgt_target(int32_t device_id, void *host_ptr, int32_t
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// arg_num, void** args_base, void **args, size_t *arg_sizes, int32_t
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// *arg_types);
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llvm::Type *TypeParams[] = {CGM.Int32Ty,
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CGM.VoidPtrTy,
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CGM.Int32Ty,
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CGM.VoidPtrPtrTy,
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CGM.VoidPtrPtrTy,
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CGM.SizeTy->getPointerTo(),
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CGM.Int32Ty->getPointerTo()};
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llvm::FunctionType *FnTy =
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llvm::FunctionType::get(CGM.Int32Ty, TypeParams, /*isVarArg*/ false);
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RTLFn = CGM.CreateRuntimeFunction(FnTy, "__tgt_target");
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break;
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}
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}
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return RTLFn;
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}
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@ -2952,3 +2993,265 @@ void CGOpenMPRuntime::emitCancelCall(CodeGenFunction &CGF, SourceLocation Loc,
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ThenGen(CGF);
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}
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}
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llvm::Value *
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CGOpenMPRuntime::emitTargetOutlinedFunction(const OMPExecutableDirective &D,
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const RegionCodeGenTy &CodeGen) {
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const CapturedStmt &CS = *cast<CapturedStmt>(D.getAssociatedStmt());
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CodeGenFunction CGF(CGM, true);
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CGOpenMPTargetRegionInfo CGInfo(CS, CodeGen);
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CodeGenFunction::CGCapturedStmtRAII CapInfoRAII(CGF, &CGInfo);
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return CGF.GenerateOpenMPCapturedStmtFunction(CS, /*UseOnlyReferences=*/true);
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}
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void CGOpenMPRuntime::emitTargetCall(CodeGenFunction &CGF,
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const OMPExecutableDirective &D,
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llvm::Value *OutlinedFn,
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const Expr *IfCond, const Expr *Device,
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ArrayRef<llvm::Value *> CapturedVars) {
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/// \brief Values for bit flags used to specify the mapping type for
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/// offloading.
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enum OpenMPOffloadMappingFlags {
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/// \brief Allocate memory on the device and move data from host to device.
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OMP_MAP_TO = 0x01,
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/// \brief Allocate memory on the device and move data from device to host.
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OMP_MAP_FROM = 0x02,
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};
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enum OpenMPOffloadingReservedDeviceIDs {
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/// \brief Device ID if the device was not defined, runtime should get it
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/// from environment variables in the spec.
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OMP_DEVICEID_UNDEF = -1,
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};
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// Fill up the arrays with the all the captured variables.
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SmallVector<llvm::Value *, 16> BasePointers;
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SmallVector<llvm::Value *, 16> Pointers;
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SmallVector<llvm::Value *, 16> Sizes;
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SmallVector<unsigned, 16> MapTypes;
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bool hasVLACaptures = false;
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const CapturedStmt &CS = *cast<CapturedStmt>(D.getAssociatedStmt());
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auto RI = CS.getCapturedRecordDecl()->field_begin();
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// auto II = CS.capture_init_begin();
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auto CV = CapturedVars.begin();
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for (CapturedStmt::const_capture_iterator CI = CS.capture_begin(),
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CE = CS.capture_end();
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CI != CE; ++CI, ++RI, ++CV) {
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StringRef Name;
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QualType Ty;
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llvm::Value *BasePointer;
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llvm::Value *Pointer;
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llvm::Value *Size;
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unsigned MapType;
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if (CI->capturesVariableArrayType()) {
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BasePointer = Pointer = *CV;
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Size = getTypeSize(CGF, RI->getType());
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hasVLACaptures = true;
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// VLA sizes don't need to be copied back from the device.
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MapType = OMP_MAP_TO;
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} else if (CI->capturesThis()) {
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BasePointer = Pointer = *CV;
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const PointerType *PtrTy = cast<PointerType>(RI->getType().getTypePtr());
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Size = getTypeSize(CGF, PtrTy->getPointeeType());
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// Default map type.
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MapType = OMP_MAP_TO | OMP_MAP_FROM;
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} else {
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BasePointer = Pointer = *CV;
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const ReferenceType *PtrTy =
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cast<ReferenceType>(RI->getType().getTypePtr());
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QualType ElementType = PtrTy->getPointeeType();
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Size = getTypeSize(CGF, ElementType);
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// Default map type.
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MapType = OMP_MAP_TO | OMP_MAP_FROM;
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}
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BasePointers.push_back(BasePointer);
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Pointers.push_back(Pointer);
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Sizes.push_back(Size);
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MapTypes.push_back(MapType);
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}
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// Keep track on whether the host function has to be executed.
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auto OffloadErrorQType =
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CGF.getContext().getIntTypeForBitwidth(/*DestWidth=*/32, /*Signed=*/true);
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auto OffloadError = CGF.MakeAddrLValue(
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CGF.CreateMemTemp(OffloadErrorQType, ".run_host_version"),
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OffloadErrorQType);
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CGF.EmitStoreOfScalar(llvm::Constant::getNullValue(CGM.Int32Ty),
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OffloadError);
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// Fill up the pointer arrays and transfer execution to the device.
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auto &&ThenGen = [this, &BasePointers, &Pointers, &Sizes, &MapTypes,
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hasVLACaptures, Device, OffloadError,
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OffloadErrorQType](CodeGenFunction &CGF) {
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unsigned PointerNumVal = BasePointers.size();
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llvm::Value *PointerNum = CGF.Builder.getInt32(PointerNumVal);
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llvm::Value *BasePointersArray;
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llvm::Value *PointersArray;
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llvm::Value *SizesArray;
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llvm::Value *MapTypesArray;
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if (PointerNumVal) {
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llvm::APInt PointerNumAP(32, PointerNumVal, /*isSigned=*/true);
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QualType PointerArrayType = CGF.getContext().getConstantArrayType(
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CGF.getContext().VoidPtrTy, PointerNumAP, ArrayType::Normal,
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/*IndexTypeQuals=*/0);
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BasePointersArray =
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CGF.CreateMemTemp(PointerArrayType, ".offload_baseptrs").getPointer();
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PointersArray =
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CGF.CreateMemTemp(PointerArrayType, ".offload_ptrs").getPointer();
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// If we don't have any VLA types, we can use a constant array for the map
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// sizes, otherwise we need to fill up the arrays as we do for the
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// pointers.
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if (hasVLACaptures) {
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QualType SizeArrayType = CGF.getContext().getConstantArrayType(
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CGF.getContext().getSizeType(), PointerNumAP, ArrayType::Normal,
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/*IndexTypeQuals=*/0);
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SizesArray =
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CGF.CreateMemTemp(SizeArrayType, ".offload_sizes").getPointer();
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} else {
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// We expect all the sizes to be constant, so we collect them to create
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// a constant array.
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SmallVector<llvm::Constant *, 16> ConstSizes;
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for (auto S : Sizes)
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ConstSizes.push_back(cast<llvm::Constant>(S));
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auto *SizesArrayInit = llvm::ConstantArray::get(
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llvm::ArrayType::get(CGM.SizeTy, ConstSizes.size()), ConstSizes);
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auto *SizesArrayGbl = new llvm::GlobalVariable(
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CGM.getModule(), SizesArrayInit->getType(),
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/*isConstant=*/true, llvm::GlobalValue::PrivateLinkage,
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SizesArrayInit, ".offload_sizes");
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SizesArrayGbl->setUnnamedAddr(true);
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SizesArray = SizesArrayGbl;
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}
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// The map types are always constant so we don't need to generate code to
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// fill arrays. Instead, we create an array constant.
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llvm::Constant *MapTypesArrayInit =
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llvm::ConstantDataArray::get(CGF.Builder.getContext(), MapTypes);
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auto *MapTypesArrayGbl = new llvm::GlobalVariable(
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CGM.getModule(), MapTypesArrayInit->getType(),
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/*isConstant=*/true, llvm::GlobalValue::PrivateLinkage,
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MapTypesArrayInit, ".offload_maptypes");
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MapTypesArrayGbl->setUnnamedAddr(true);
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MapTypesArray = MapTypesArrayGbl;
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for (unsigned i = 0; i < PointerNumVal; ++i) {
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llvm::Value *BP = CGF.Builder.CreateConstInBoundsGEP2_32(
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llvm::ArrayType::get(CGM.VoidPtrTy, PointerNumVal),
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BasePointersArray, 0, i);
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Address BPAddr(BP, CGM.getContext().getTypeAlignInChars(
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CGM.getContext().VoidPtrTy));
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CGF.Builder.CreateStore(
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CGF.Builder.CreateBitCast(BasePointers[i], CGM.VoidPtrTy), BPAddr);
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llvm::Value *P = CGF.Builder.CreateConstInBoundsGEP2_32(
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llvm::ArrayType::get(CGM.VoidPtrTy, PointerNumVal), PointersArray,
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0, i);
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Address PAddr(P, CGM.getContext().getTypeAlignInChars(
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CGM.getContext().VoidPtrTy));
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CGF.Builder.CreateStore(
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CGF.Builder.CreateBitCast(Pointers[i], CGM.VoidPtrTy), PAddr);
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if (hasVLACaptures) {
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llvm::Value *S = CGF.Builder.CreateConstInBoundsGEP2_32(
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llvm::ArrayType::get(CGM.SizeTy, PointerNumVal), SizesArray,
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/*Idx0=*/0,
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/*Idx1=*/i);
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Address SAddr(S, CGM.getContext().getTypeAlignInChars(
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CGM.getContext().getSizeType()));
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CGF.Builder.CreateStore(CGF.Builder.CreateIntCast(
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Sizes[i], CGM.SizeTy, /*isSigned=*/true),
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SAddr);
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}
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}
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BasePointersArray = CGF.Builder.CreateConstInBoundsGEP2_32(
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llvm::ArrayType::get(CGM.VoidPtrTy, PointerNumVal), BasePointersArray,
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/*Idx0=*/0, /*Idx1=*/0);
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PointersArray = CGF.Builder.CreateConstInBoundsGEP2_32(
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llvm::ArrayType::get(CGM.VoidPtrTy, PointerNumVal), PointersArray,
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/*Idx0=*/0,
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/*Idx1=*/0);
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SizesArray = CGF.Builder.CreateConstInBoundsGEP2_32(
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llvm::ArrayType::get(CGM.SizeTy, PointerNumVal), SizesArray,
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/*Idx0=*/0, /*Idx1=*/0);
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MapTypesArray = CGF.Builder.CreateConstInBoundsGEP2_32(
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llvm::ArrayType::get(CGM.Int32Ty, PointerNumVal), MapTypesArray,
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/*Idx0=*/0,
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/*Idx1=*/0);
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} else {
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BasePointersArray = llvm::ConstantPointerNull::get(CGM.VoidPtrPtrTy);
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PointersArray = llvm::ConstantPointerNull::get(CGM.VoidPtrPtrTy);
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SizesArray = llvm::ConstantPointerNull::get(CGM.SizeTy->getPointerTo());
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MapTypesArray =
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llvm::ConstantPointerNull::get(CGM.Int32Ty->getPointerTo());
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}
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// On top of the arrays that were filled up, the target offloading call
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// takes as arguments the device id as well as the host pointer. The host
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// pointer is used by the runtime library to identify the current target
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// region, so it only has to be unique and not necessarily point to
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// anything. It could be the pointer to the outlined function that
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// implements the target region, but we aren't using that so that the
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// compiler doesn't need to keep that, and could therefore inline the host
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// function if proven worthwhile during optimization.
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llvm::Value *HostPtr = new llvm::GlobalVariable(
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CGM.getModule(), CGM.Int8Ty, /*isConstant=*/true,
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llvm::GlobalValue::PrivateLinkage,
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llvm::Constant::getNullValue(CGM.Int8Ty), ".offload_hstptr");
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// Emit device ID if any.
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llvm::Value *DeviceID;
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if (Device)
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DeviceID = CGF.Builder.CreateIntCast(CGF.EmitScalarExpr(Device),
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CGM.Int32Ty, /*isSigned=*/true);
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else
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DeviceID = CGF.Builder.getInt32(OMP_DEVICEID_UNDEF);
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llvm::Value *OffloadingArgs[] = {
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DeviceID, HostPtr, PointerNum, BasePointersArray,
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PointersArray, SizesArray, MapTypesArray};
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auto Return = CGF.EmitRuntimeCall(createRuntimeFunction(OMPRTL__tgt_target),
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OffloadingArgs);
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CGF.EmitStoreOfScalar(Return, OffloadError);
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};
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if (IfCond) {
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// Notify that the host version must be executed.
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auto &&ElseGen = [this, OffloadError,
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OffloadErrorQType](CodeGenFunction &CGF) {
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CGF.EmitStoreOfScalar(llvm::ConstantInt::get(CGM.Int32Ty, /*V=*/-1u),
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OffloadError);
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};
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emitOMPIfClause(CGF, IfCond, ThenGen, ElseGen);
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} else {
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CodeGenFunction::RunCleanupsScope Scope(CGF);
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ThenGen(CGF);
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}
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// Check the error code and execute the host version if required.
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auto OffloadFailedBlock = CGF.createBasicBlock("omp_offload.failed");
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auto OffloadContBlock = CGF.createBasicBlock("omp_offload.cont");
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auto OffloadErrorVal = CGF.EmitLoadOfScalar(OffloadError, SourceLocation());
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auto Failed = CGF.Builder.CreateIsNotNull(OffloadErrorVal);
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CGF.Builder.CreateCondBr(Failed, OffloadFailedBlock, OffloadContBlock);
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CGF.EmitBlock(OffloadFailedBlock);
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CGF.Builder.CreateCall(OutlinedFn, BasePointers);
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CGF.EmitBranch(OffloadContBlock);
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CGF.EmitBlock(OffloadContBlock, /*IsFinished=*/true);
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return;
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}
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@ -154,6 +154,14 @@ private:
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// Call to kmp_int32 __kmpc_cancel(ident_t *loc, kmp_int32 global_tid,
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// kmp_int32 cncl_kind);
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OMPRTL__kmpc_cancel,
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//
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// Offloading related calls
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//
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// Call to int32_t __tgt_target(int32_t device_id, void *host_ptr, int32_t
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// arg_num, void** args_base, void **args, size_t *arg_sizes, int32_t
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// *arg_types);
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OMPRTL__tgt_target,
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};
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/// \brief Values for bit flags used in the ident_t to describe the fields.
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@ -725,6 +733,29 @@ public:
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virtual void emitCancelCall(CodeGenFunction &CGF, SourceLocation Loc,
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const Expr *IfCond,
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OpenMPDirectiveKind CancelRegion);
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/// \brief Emit outilined function for 'target' directive.
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/// \param D Directive to emit.
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/// \param CodeGen Code generation sequence for the \a D directive.
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virtual llvm::Value *
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emitTargetOutlinedFunction(const OMPExecutableDirective &D,
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const RegionCodeGenTy &CodeGen);
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/// \brief Emit the target offloading code associated with \a D. The emitted
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/// code attempts offloading the execution to the device, an the event of
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/// a failure it executes the host version outlined in \a OutlinedFn.
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/// \param D Directive to emit.
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/// \param OutlinedFn Host version of the code to be offloaded.
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/// \param IfCond Expression evaluated in if clause associated with the target
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/// directive, or null if no if clause is used.
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/// \param Device Expression evaluated in device clause associated with the
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/// target directive, or null if no device clause is used.
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/// \param CapturedVars Values captured in the current region.
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virtual void emitTargetCall(CodeGenFunction &CGF,
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const OMPExecutableDirective &D,
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llvm::Value *OutlinedFn, const Expr *IfCond,
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const Expr *Device,
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ArrayRef<llvm::Value *> CapturedVars);
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};
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} // namespace CodeGen
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@ -21,7 +21,8 @@ using namespace clang;
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using namespace CodeGen;
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void CodeGenFunction::GenerateOpenMPCapturedVars(
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const CapturedStmt &S, SmallVectorImpl<llvm::Value *> &CapturedVars) {
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const CapturedStmt &S, SmallVectorImpl<llvm::Value *> &CapturedVars,
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bool UseOnlyReferences) {
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const RecordDecl *RD = S.getCapturedRecordDecl();
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auto CurField = RD->field_begin();
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auto CurCap = S.captures().begin();
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@ -30,7 +31,17 @@ void CodeGenFunction::GenerateOpenMPCapturedVars(
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I != E; ++I, ++CurField, ++CurCap) {
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if (CurField->hasCapturedVLAType()) {
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auto VAT = CurField->getCapturedVLAType();
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CapturedVars.push_back(VLASizeMap[VAT->getSizeExpr()]);
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auto *Val = VLASizeMap[VAT->getSizeExpr()];
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// If we need to use only references, create a temporary location for the
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// size of the VAT.
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if (UseOnlyReferences) {
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LValue LV =
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MakeAddrLValue(CreateMemTemp(CurField->getType(), "__vla_size_ref"),
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CurField->getType());
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EmitStoreThroughLValue(RValue::get(Val), LV);
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Val = LV.getAddress().getPointer();
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}
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CapturedVars.push_back(Val);
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} else if (CurCap->capturesThis())
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CapturedVars.push_back(CXXThisValue);
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else
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|
|
@ -39,7 +50,8 @@ void CodeGenFunction::GenerateOpenMPCapturedVars(
|
|||
}
|
||||
|
||||
llvm::Function *
|
||||
CodeGenFunction::GenerateOpenMPCapturedStmtFunction(const CapturedStmt &S) {
|
||||
CodeGenFunction::GenerateOpenMPCapturedStmtFunction(const CapturedStmt &S,
|
||||
bool UseOnlyReferences) {
|
||||
assert(
|
||||
CapturedStmtInfo &&
|
||||
"CapturedStmtInfo should be set when generating the captured function");
|
||||
|
|
@ -65,6 +77,9 @@ CodeGenFunction::GenerateOpenMPCapturedStmtFunction(const CapturedStmt &S) {
|
|||
else {
|
||||
assert(I->capturesVariableArrayType());
|
||||
II = &getContext().Idents.get("vla");
|
||||
if (UseOnlyReferences)
|
||||
ArgType = getContext().getLValueReferenceType(
|
||||
ArgType, /*SpelledAsLValue=*/false);
|
||||
}
|
||||
if (ArgType->isVariablyModifiedType())
|
||||
ArgType = getContext().getVariableArrayDecayedType(ArgType);
|
||||
|
|
@ -100,6 +115,9 @@ CodeGenFunction::GenerateOpenMPCapturedStmtFunction(const CapturedStmt &S) {
|
|||
MakeAddrLValue(GetAddrOfLocalVar(Args[Cnt]), Args[Cnt]->getType(),
|
||||
AlignmentSource::Decl);
|
||||
if (FD->hasCapturedVLAType()) {
|
||||
if (UseOnlyReferences)
|
||||
ArgLVal = EmitLoadOfReferenceLValue(
|
||||
ArgLVal.getAddress(), ArgLVal.getType()->castAs<ReferenceType>());
|
||||
auto *ExprArg =
|
||||
EmitLoadOfLValue(ArgLVal, SourceLocation()).getScalarVal();
|
||||
auto VAT = FD->getCapturedVLAType();
|
||||
|
|
@ -2269,8 +2287,37 @@ void CodeGenFunction::EmitOMPAtomicDirective(const OMPAtomicDirective &S) {
|
|||
CGM.getOpenMPRuntime().emitInlinedDirective(*this, OMPD_atomic, CodeGen);
|
||||
}
|
||||
|
||||
void CodeGenFunction::EmitOMPTargetDirective(const OMPTargetDirective &) {
|
||||
llvm_unreachable("CodeGen for 'omp target' is not supported yet.");
|
||||
void CodeGenFunction::EmitOMPTargetDirective(const OMPTargetDirective &S) {
|
||||
LexicalScope Scope(*this, S.getSourceRange());
|
||||
const CapturedStmt &CS = *cast<CapturedStmt>(S.getAssociatedStmt());
|
||||
|
||||
llvm::SmallVector<llvm::Value *, 16> CapturedVars;
|
||||
GenerateOpenMPCapturedVars(CS, CapturedVars, /*UseOnlyReferences=*/true);
|
||||
|
||||
// Emit target region as a standalone region.
|
||||
auto &&CodeGen = [&CS](CodeGenFunction &CGF) {
|
||||
CGF.EmitStmt(CS.getCapturedStmt());
|
||||
};
|
||||
|
||||
// Obtain the target region outlined function.
|
||||
llvm::Value *Fn =
|
||||
CGM.getOpenMPRuntime().emitTargetOutlinedFunction(S, CodeGen);
|
||||
|
||||
// Check if we have any if clause associated with the directive.
|
||||
const Expr *IfCond = nullptr;
|
||||
|
||||
if (auto *C = S.getSingleClause<OMPIfClause>()) {
|
||||
IfCond = C->getCondition();
|
||||
}
|
||||
|
||||
// Check if we have any device clause associated with the directive.
|
||||
const Expr *Device = nullptr;
|
||||
if (auto *C = S.getSingleClause<OMPDeviceClause>()) {
|
||||
Device = C->getDevice();
|
||||
}
|
||||
|
||||
CGM.getOpenMPRuntime().emitTargetCall(*this, S, Fn, IfCond, Device,
|
||||
CapturedVars);
|
||||
}
|
||||
|
||||
void CodeGenFunction::EmitOMPTeamsDirective(const OMPTeamsDirective &) {
|
||||
|
|
|
|||
|
|
@ -2224,9 +2224,12 @@ public:
|
|||
llvm::Function *EmitCapturedStmt(const CapturedStmt &S, CapturedRegionKind K);
|
||||
llvm::Function *GenerateCapturedStmtFunction(const CapturedStmt &S);
|
||||
Address GenerateCapturedStmtArgument(const CapturedStmt &S);
|
||||
llvm::Function *GenerateOpenMPCapturedStmtFunction(const CapturedStmt &S);
|
||||
llvm::Function *
|
||||
GenerateOpenMPCapturedStmtFunction(const CapturedStmt &S,
|
||||
bool UseOnlyReferences = false);
|
||||
void GenerateOpenMPCapturedVars(const CapturedStmt &S,
|
||||
SmallVectorImpl<llvm::Value *> &CapturedVars);
|
||||
SmallVectorImpl<llvm::Value *> &CapturedVars,
|
||||
bool UseOnlyReferences = false);
|
||||
/// \brief Perform element by element copying of arrays with type \a
|
||||
/// OriginalType from \a SrcAddr to \a DestAddr using copying procedure
|
||||
/// generated by \a CopyGen.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,644 @@
|
|||
// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s
|
||||
// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -emit-pch -o %t %s
|
||||
// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
|
||||
// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -emit-llvm %s -o - | FileCheck %s
|
||||
// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -emit-pch -o %t %s
|
||||
// RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
|
||||
// expected-no-diagnostics
|
||||
#ifndef HEADER
|
||||
#define HEADER
|
||||
|
||||
// CHECK-DAG: [[TT:%.+]] = type { i64, i8 }
|
||||
// CHECK-DAG: [[S1:%.+]] = type { double }
|
||||
|
||||
// We have 8 target regions, but only 7 that actually will generate offloading
|
||||
// code, only 6 will have mapped arguments, and only 4 have all-constant map
|
||||
// sizes.
|
||||
|
||||
// CHECK-DAG: [[SIZET2:@.+]] = private unnamed_addr constant [1 x i{{32|64}}] [i[[SZ:32|64]] 2]
|
||||
// CHECK-DAG: [[MAPT2:@.+]] = private unnamed_addr constant [1 x i32] [i32 3]
|
||||
// CHECK-DAG: [[SIZET3:@.+]] = private unnamed_addr constant [2 x i[[SZ]]] [i[[SZ]] 4, i[[SZ]] 2]
|
||||
// CHECK-DAG: [[MAPT3:@.+]] = private unnamed_addr constant [2 x i32] [i32 3, i32 3]
|
||||
// CHECK-DAG: [[MAPT4:@.+]] = private unnamed_addr constant [9 x i32] [i32 3, i32 3, i32 1, i32 3, i32 3, i32 1, i32 1, i32 3, i32 3]
|
||||
// CHECK-DAG: [[SIZET5:@.+]] = private unnamed_addr constant [3 x i[[SZ]]] [i[[SZ]] 4, i[[SZ]] 2, i[[SZ]] 40]
|
||||
// CHECK-DAG: [[MAPT5:@.+]] = private unnamed_addr constant [3 x i32] [i32 3, i32 3, i32 3]
|
||||
// CHECK-DAG: [[SIZET6:@.+]] = private unnamed_addr constant [4 x i[[SZ]]] [i[[SZ]] 4, i[[SZ]] 2, i[[SZ]] 1, i[[SZ]] 40]
|
||||
// CHECK-DAG: [[MAPT6:@.+]] = private unnamed_addr constant [4 x i32] [i32 3, i32 3, i32 3, i32 3]
|
||||
// CHECK-DAG: [[MAPT7:@.+]] = private unnamed_addr constant [5 x i32] [i32 3, i32 3, i32 1, i32 1, i32 3]
|
||||
// CHECK-DAG: @{{.*}} = private constant i8 0
|
||||
// CHECK-DAG: @{{.*}} = private constant i8 0
|
||||
// CHECK-DAG: @{{.*}} = private constant i8 0
|
||||
// CHECK-DAG: @{{.*}} = private constant i8 0
|
||||
// CHECK-DAG: @{{.*}} = private constant i8 0
|
||||
// CHECK-DAG: @{{.*}} = private constant i8 0
|
||||
// CHECK-DAG: @{{.*}} = private constant i8 0
|
||||
|
||||
template<typename tx, typename ty>
|
||||
struct TT{
|
||||
tx X;
|
||||
ty Y;
|
||||
};
|
||||
|
||||
// CHECK: define {{.*}}[[FOO:@.+]](
|
||||
int foo(int n) {
|
||||
int a = 0;
|
||||
short aa = 0;
|
||||
float b[10];
|
||||
float bn[n];
|
||||
double c[5][10];
|
||||
double cn[5][n];
|
||||
TT<long long, char> d;
|
||||
|
||||
// CHECK: [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 0, i8** null, i8** null, i[[SZ]]* null, i32* null)
|
||||
// CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 4
|
||||
// CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
|
||||
// CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
|
||||
// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]]
|
||||
// CHECK: [[FAIL]]
|
||||
// CHECK: call void [[HVT0:@.+]]()
|
||||
// CHECK-NEXT: br label %[[END]]
|
||||
// CHECK: [[END]]
|
||||
#pragma omp target
|
||||
{
|
||||
}
|
||||
|
||||
// CHECK: store i32 0, i32* [[RHV:%.+]], align 4
|
||||
// CHECK: store i32 -1, i32* [[RHV]], align 4
|
||||
// CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
|
||||
// CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
|
||||
// CHECK: call void [[HVT1:@.+]](i32* {{[^,]+}})
|
||||
#pragma omp target if(0)
|
||||
{
|
||||
a += 1;
|
||||
}
|
||||
|
||||
// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 1, i8** [[BP:%[^,]+]], i8** [[P:%[^,]+]], i[[SZ]]* getelementptr inbounds ([1 x i[[SZ]]], [1 x i[[SZ]]]* [[SIZET2]], i32 0, i32 0), i32* getelementptr inbounds ([1 x i32], [1 x i32]* [[MAPT2]], i32 0, i32 0))
|
||||
// CHECK-DAG: [[BP]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[BPR:%[^,]+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[P]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[PR:%[^,]+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[BPADDR0:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[BPR]], i32 0, i32 [[IDX0:[0-9]+]]
|
||||
// CHECK-DAG: [[PADDR0:%.+]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[PR]], i32 0, i32 [[IDX0]]
|
||||
// CHECK-DAG: store i8* [[BP0:%[^,]+]], i8** [[BPADDR0]]
|
||||
// CHECK-DAG: store i8* [[P0:%[^,]+]], i8** [[PADDR0]]
|
||||
// CHECK-DAG: [[BP0]] = bitcast i16* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P0]] = bitcast i16* %{{.+}} to i8*
|
||||
|
||||
// CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 4
|
||||
// CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
|
||||
// CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
|
||||
// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]]
|
||||
// CHECK: [[FAIL]]
|
||||
// CHECK: call void [[HVT2:@.+]](i16* {{[^,]+}})
|
||||
// CHECK-NEXT: br label %[[END]]
|
||||
// CHECK: [[END]]
|
||||
#pragma omp target if(1)
|
||||
{
|
||||
aa += 1;
|
||||
}
|
||||
|
||||
// CHECK: [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 10
|
||||
// CHECK: br i1 [[IF]], label %[[IFTHEN:[^,]+]], label %[[IFELSE:[^,]+]]
|
||||
// CHECK: [[IFTHEN]]
|
||||
// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 2, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* getelementptr inbounds ([2 x i[[SZ]]], [2 x i[[SZ]]]* [[SIZET3]], i32 0, i32 0), i32* getelementptr inbounds ([2 x i32], [2 x i32]* [[MAPT3]], i32 0, i32 0))
|
||||
// CHECK-DAG: [[BPR]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[BP:%[^,]+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[PR]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[P:%[^,]+]], i32 0, i32 0
|
||||
|
||||
// CHECK-DAG: [[BPADDR0:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[BP]], i32 0, i32 0
|
||||
// CHECK-DAG: [[PADDR0:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[P]], i32 0, i32 0
|
||||
// CHECK-DAG: store i8* [[BP0:%[^,]+]], i8** [[BPADDR0]]
|
||||
// CHECK-DAG: store i8* [[P0:%[^,]+]], i8** [[PADDR0]]
|
||||
// CHECK-DAG: [[BP0]] = bitcast i32* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P0]] = bitcast i32* %{{.+}} to i8*
|
||||
|
||||
// CHECK-DAG: [[BPADDR1:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[BP]], i32 0, i32 1
|
||||
// CHECK-DAG: [[PADDR1:%.+]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[P]], i32 0, i32 1
|
||||
// CHECK-DAG: store i8* [[BP1:%[^,]+]], i8** [[BPADDR1]]
|
||||
// CHECK-DAG: store i8* [[P1:%[^,]+]], i8** [[PADDR1]]
|
||||
// CHECK-DAG: [[BP1]] = bitcast i16* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P1]] = bitcast i16* %{{.+}} to i8*
|
||||
// CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 4
|
||||
// CHECK-NEXT: br label %[[IFEND:.+]]
|
||||
|
||||
// CHECK: [[IFELSE]]
|
||||
// CHECK: store i32 -1, i32* [[RHV]], align 4
|
||||
// CHECK-NEXT: br label %[[IFEND:.+]]
|
||||
|
||||
// CHECK: [[IFEND]]
|
||||
// CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
|
||||
// CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
|
||||
// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
|
||||
// CHECK: [[FAIL]]
|
||||
// CHECK: call void [[HVT3:@.+]]({{[^,]+}}, {{[^,]+}})
|
||||
// CHECK-NEXT: br label %[[END]]
|
||||
// CHECK: [[END]]
|
||||
#pragma omp target if(n>10)
|
||||
{
|
||||
a += 1;
|
||||
aa += 1;
|
||||
}
|
||||
|
||||
// We capture 3 VLA sizes in this target region
|
||||
// CHECK: store i[[SZ]] [[BNELEMSIZE:%.+]], i[[SZ]]* [[VLA0:%[^,]+]]
|
||||
// CHECK: store i[[SZ]] 5, i[[SZ]]* [[VLA1:%[^,]+]]
|
||||
// CHECK: store i[[SZ]] [[CNELEMSIZE1:%.+]], i[[SZ]]* [[VLA2:%[^,]+]]
|
||||
|
||||
// CHECK: [[BNSIZE:%.+]] = mul nuw i[[SZ]] [[BNELEMSIZE]], 4
|
||||
// CHECK: [[CNELEMSIZE2:%.+]] = mul nuw i[[SZ]] 5, [[CNELEMSIZE1]]
|
||||
// CHECK: [[CNSIZE:%.+]] = mul nuw i[[SZ]] [[CNELEMSIZE2]], 8
|
||||
|
||||
// CHECK: [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 20
|
||||
// CHECK: br i1 [[IF]], label %[[TRY:[^,]+]], label %[[FAIL:[^,]+]]
|
||||
// CHECK: [[TRY]]
|
||||
// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 9, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* [[SR:%[^,]+]], i32* getelementptr inbounds ([9 x i32], [9 x i32]* [[MAPT4]], i32 0, i32 0))
|
||||
// CHECK-DAG: [[BPR]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP:%[^,]+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[PR]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P:%[^,]+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[SR]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S:%[^,]+]], i32 0, i32 0
|
||||
|
||||
// CHECK-DAG: [[SADDR0:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX0:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR0:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX0]]
|
||||
// CHECK-DAG: [[PADDR0:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX0]]
|
||||
// CHECK-DAG: [[SADDR1:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX1:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR1:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX1]]
|
||||
// CHECK-DAG: [[PADDR1:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX1]]
|
||||
// CHECK-DAG: [[SADDR2:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX2:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR2:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX2]]
|
||||
// CHECK-DAG: [[PADDR2:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX2]]
|
||||
// CHECK-DAG: [[SADDR3:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX3:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR3:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX3]]
|
||||
// CHECK-DAG: [[PADDR3:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX3]]
|
||||
// CHECK-DAG: [[SADDR4:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX4:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR4:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX4]]
|
||||
// CHECK-DAG: [[PADDR4:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX4]]
|
||||
// CHECK-DAG: [[SADDR5:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX5:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR5:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX5]]
|
||||
// CHECK-DAG: [[PADDR5:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX5]]
|
||||
// CHECK-DAG: [[SADDR6:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX6:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR6:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX6]]
|
||||
// CHECK-DAG: [[PADDR6:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX6]]
|
||||
// CHECK-DAG: [[SADDR7:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX7:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR7:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX7]]
|
||||
// CHECK-DAG: [[PADDR7:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX7]]
|
||||
// CHECK-DAG: [[SADDR8:%.+]] = getelementptr inbounds [9 x i[[SZ]]], [9 x i[[SZ]]]* [[S]], i32 0, i32 [[IDX8:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR8:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[BP]], i32 0, i32 [[IDX8]]
|
||||
// CHECK-DAG: [[PADDR8:%.+]] = getelementptr inbounds [9 x i8*], [9 x i8*]* [[P]], i32 0, i32 [[IDX8]]
|
||||
|
||||
// The names below are not necessarily consistent with the names used for the
|
||||
// addresses above as some are repeated.
|
||||
// CHECK-DAG: [[BP0:%[^,]+]] = bitcast i[[SZ]]* [[VLA0]] to i8*
|
||||
// CHECK-DAG: [[P0:%[^,]+]] = bitcast i[[SZ]]* [[VLA0]] to i8*
|
||||
// CHECK-DAG: store i8* [[BP0]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P0]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP1:%[^,]+]] = bitcast i[[SZ]]* [[VLA1]] to i8*
|
||||
// CHECK-DAG: [[P1:%[^,]+]] = bitcast i[[SZ]]* [[VLA1]] to i8*
|
||||
// CHECK-DAG: store i8* [[BP1]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P1]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP2:%[^,]+]] = bitcast i[[SZ]]* [[VLA2]] to i8*
|
||||
// CHECK-DAG: [[P2:%[^,]+]] = bitcast i[[SZ]]* [[VLA2]] to i8*
|
||||
// CHECK-DAG: store i8* [[BP2]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P2]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP3:%[^,]+]] = bitcast i32* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P3:%[^,]+]] = bitcast i32* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP3]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P3]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] 4, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP4:%[^,]+]] = bitcast [10 x float]* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P4:%[^,]+]] = bitcast [10 x float]* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP4]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P4]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] 40, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP5:%[^,]+]] = bitcast float* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P5:%[^,]+]] = bitcast float* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP5]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P5]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] [[BNSIZE]], i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP6:%[^,]+]] = bitcast [5 x [10 x double]]* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P6:%[^,]+]] = bitcast [5 x [10 x double]]* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP6]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P6]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] 400, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP7:%[^,]+]] = bitcast double* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P7:%[^,]+]] = bitcast double* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP7]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P7]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] [[CNSIZE]], i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP8:%[^,]+]] = bitcast [[TT]]* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P8:%[^,]+]] = bitcast [[TT]]* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP8]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P8]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] {{12|16}}, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 4
|
||||
// CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
|
||||
// CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
|
||||
// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]]
|
||||
|
||||
// CHECK: [[FAIL]]
|
||||
// CHECK: call void [[HVT4:@.+]]({{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}})
|
||||
// CHECK-NEXT: br label %[[END]]
|
||||
// CHECK: [[END]]
|
||||
#pragma omp target if(n>20)
|
||||
{
|
||||
a += 1;
|
||||
b[2] += 1.0;
|
||||
bn[3] += 1.0;
|
||||
c[1][2] += 1.0;
|
||||
cn[1][3] += 1.0;
|
||||
d.X += 1;
|
||||
d.Y += 1;
|
||||
}
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
// Check that the offloading functions are emitted and that the arguments are
|
||||
// correct and loaded correctly for the target regions in foo().
|
||||
|
||||
// CHECK: define internal void [[HVT0]]()
|
||||
|
||||
// CHECK: define internal void [[HVT1]](i32* dereferenceable(4) %{{.+}})
|
||||
// Create stack storage and store argument in there.
|
||||
// CHECK: [[A_ADDR:%.+]] = alloca i32*, align
|
||||
// CHECK: store i32* %{{.+}}, i32** [[A_ADDR]], align
|
||||
// CHECK: [[A_ADDR2:%.+]] = load i32*, i32** [[A_ADDR]], align
|
||||
// CHECK: load i32, i32* [[A_ADDR2]], align
|
||||
|
||||
// CHECK: define internal void [[HVT2]](i16* dereferenceable(2) %{{.+}})
|
||||
// Create stack storage and store argument in there.
|
||||
// CHECK: [[AA_ADDR:%.+]] = alloca i16*, align
|
||||
// CHECK: store i16* %{{.+}}, i16** [[AA_ADDR]], align
|
||||
// CHECK: [[AA_ADDR2:%.+]] = load i16*, i16** [[AA_ADDR]], align
|
||||
// CHECK: load i16, i16* [[AA_ADDR2]], align
|
||||
|
||||
// CHECK: define internal void [[HVT3]]
|
||||
// Create stack storage and store argument in there.
|
||||
// CHECK-DAG: [[A_ADDR:%.+]] = alloca i32*, align
|
||||
// CHECK-DAG: [[AA_ADDR:%.+]] = alloca i16*, align
|
||||
// CHECK-DAG: store i32* %{{.+}}, i32** [[A_ADDR]], align
|
||||
// CHECK-DAG: store i16* %{{.+}}, i16** [[AA_ADDR]], align
|
||||
// CHECK-DAG: [[A_ADDR2:%.+]] = load i32*, i32** [[A_ADDR]], align
|
||||
// CHECK-DAG: [[AA_ADDR2:%.+]] = load i16*, i16** [[AA_ADDR]], align
|
||||
// CHECK-DAG: load i32, i32* [[A_ADDR2]], align
|
||||
// CHECK-DAG: load i16, i16* [[AA_ADDR2]], align
|
||||
|
||||
// CHECK: define internal void [[HVT4]]
|
||||
// Create local storage for each capture.
|
||||
// CHECK-DAG: [[LOCAL_A:%.+]] = alloca i32*
|
||||
// CHECK-DAG: [[LOCAL_B:%.+]] = alloca [10 x float]*
|
||||
// CHECK-DAG: [[LOCAL_VLA1:%.+]] = alloca i[[SZ]]*
|
||||
// CHECK-DAG: [[LOCAL_BN:%.+]] = alloca float*
|
||||
// CHECK-DAG: [[LOCAL_C:%.+]] = alloca [5 x [10 x double]]*
|
||||
// CHECK-DAG: [[LOCAL_VLA2:%.+]] = alloca i[[SZ]]*
|
||||
// CHECK-DAG: [[LOCAL_VLA3:%.+]] = alloca i[[SZ]]*
|
||||
// CHECK-DAG: [[LOCAL_CN:%.+]] = alloca double*
|
||||
// CHECK-DAG: [[LOCAL_D:%.+]] = alloca [[TT]]*
|
||||
// CHECK-DAG: store i32* [[ARG_A:%.+]], i32** [[LOCAL_A]]
|
||||
// CHECK-DAG: store [10 x float]* [[ARG_B:%.+]], [10 x float]** [[LOCAL_B]]
|
||||
// CHECK-DAG: store i[[SZ]]* [[ARG_VLA1:%.+]], i[[SZ]]** [[LOCAL_VLA1]]
|
||||
// CHECK-DAG: store float* [[ARG_BN:%.+]], float** [[LOCAL_BN]]
|
||||
// CHECK-DAG: store [5 x [10 x double]]* [[ARG_C:%.+]], [5 x [10 x double]]** [[LOCAL_C]]
|
||||
// CHECK-DAG: store i[[SZ]]* [[ARG_VLA2:%.+]], i[[SZ]]** [[LOCAL_VLA2]]
|
||||
// CHECK-DAG: store i[[SZ]]* [[ARG_VLA3:%.+]], i[[SZ]]** [[LOCAL_VLA3]]
|
||||
// CHECK-DAG: store double* [[ARG_CN:%.+]], double** [[LOCAL_CN]]
|
||||
// CHECK-DAG: store [[TT]]* [[ARG_D:%.+]], [[TT]]** [[LOCAL_D]]
|
||||
|
||||
// CHECK-DAG: [[REF_A:%.+]] = load i32*, i32** [[LOCAL_A]],
|
||||
// CHECK-DAG: [[REF_B:%.+]] = load [10 x float]*, [10 x float]** [[LOCAL_B]],
|
||||
// CHECK-DAG: [[REF_VLA1:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA1]],
|
||||
// CHECK-DAG: [[VAL_VLA1:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA1]],
|
||||
// CHECK-DAG: [[REF_BN:%.+]] = load float*, float** [[LOCAL_BN]],
|
||||
// CHECK-DAG: [[REF_C:%.+]] = load [5 x [10 x double]]*, [5 x [10 x double]]** [[LOCAL_C]],
|
||||
// CHECK-DAG: [[REF_VLA2:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA2]],
|
||||
// CHECK-DAG: [[VAL_VLA2:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA2]],
|
||||
// CHECK-DAG: [[REF_VLA3:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA3]],
|
||||
// CHECK-DAG: [[VAL_VLA3:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA3]],
|
||||
// CHECK-DAG: [[REF_CN:%.+]] = load double*, double** [[LOCAL_CN]],
|
||||
// CHECK-DAG: [[REF_D:%.+]] = load [[TT]]*, [[TT]]** [[LOCAL_D]],
|
||||
|
||||
// Use captures.
|
||||
// CHECK-DAG: load i32, i32* [[REF_A]]
|
||||
// CHECK-DAG: getelementptr inbounds [10 x float], [10 x float]* [[REF_B]], i[[SZ]] 0, i[[SZ]] 2
|
||||
// CHECK-DAG: getelementptr inbounds float, float* [[REF_BN]], i[[SZ]] 3
|
||||
// CHECK-DAG: getelementptr inbounds [5 x [10 x double]], [5 x [10 x double]]* [[REF_C]], i[[SZ]] 0, i[[SZ]] 1
|
||||
// CHECK-DAG: getelementptr inbounds double, double* [[REF_CN]], i[[SZ]] %{{.+}}
|
||||
// CHECK-DAG: getelementptr inbounds [[TT]], [[TT]]* [[REF_D]], i32 0, i32 0
|
||||
|
||||
template<typename tx>
|
||||
tx ftemplate(int n) {
|
||||
tx a = 0;
|
||||
short aa = 0;
|
||||
tx b[10];
|
||||
|
||||
#pragma omp target if(n>40)
|
||||
{
|
||||
a += 1;
|
||||
aa += 1;
|
||||
b[2] += 1;
|
||||
}
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
static
|
||||
int fstatic(int n) {
|
||||
int a = 0;
|
||||
short aa = 0;
|
||||
char aaa = 0;
|
||||
int b[10];
|
||||
|
||||
#pragma omp target if(n>50)
|
||||
{
|
||||
a += 1;
|
||||
aa += 1;
|
||||
aaa += 1;
|
||||
b[2] += 1;
|
||||
}
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
struct S1 {
|
||||
double a;
|
||||
|
||||
int r1(int n){
|
||||
int b = n+1;
|
||||
short int c[2][n];
|
||||
|
||||
#pragma omp target if(n>60)
|
||||
{
|
||||
this->a = (double)b + 1.5;
|
||||
c[1][1] = ++a;
|
||||
}
|
||||
|
||||
return c[1][1] + (int)b;
|
||||
}
|
||||
};
|
||||
|
||||
// CHECK: define {{.*}}@{{.*}}bar{{.*}}
|
||||
int bar(int n){
|
||||
int a = 0;
|
||||
|
||||
// CHECK: call {{.*}}i32 [[FOO]](i32 {{.*}})
|
||||
a += foo(n);
|
||||
|
||||
S1 S;
|
||||
// CHECK: call {{.*}}i32 [[FS1:@.+]]([[S1]]* {{.*}}, i32 {{.*}})
|
||||
a += S.r1(n);
|
||||
|
||||
// CHECK: call {{.*}}i32 [[FSTATIC:@.+]](i32 {{.*}})
|
||||
a += fstatic(n);
|
||||
|
||||
// CHECK: call {{.*}}i32 [[FTEMPLATE:@.+]](i32 {{.*}})
|
||||
a += ftemplate<int>(n);
|
||||
|
||||
return a;
|
||||
}
|
||||
|
||||
//
|
||||
// CHECK: define {{.*}}[[FS1]]
|
||||
//
|
||||
// We capture 2 VLA sizes in this target region
|
||||
// CHECK: store i[[SZ]] 2, i[[SZ]]* [[VLA0:%[^,]+]]
|
||||
// CHECK: store i[[SZ]] [[CELEMSIZE1:%.+]], i[[SZ]]* [[VLA1:%[^,]+]]
|
||||
// CHECK: [[CELEMSIZE2:%.+]] = mul nuw i[[SZ]] 2, [[CELEMSIZE1]]
|
||||
// CHECK: [[CSIZE:%.+]] = mul nuw i[[SZ]] [[CELEMSIZE2]], 2
|
||||
|
||||
// CHECK: [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 60
|
||||
// CHECK: br i1 [[IF]], label %[[TRY:[^,]+]], label %[[FAIL:[^,]+]]
|
||||
// CHECK: [[TRY]]
|
||||
// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 5, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* [[SR:%[^,]+]], i32* getelementptr inbounds ([5 x i32], [5 x i32]* [[MAPT7]], i32 0, i32 0))
|
||||
// CHECK-DAG: [[BPR]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP:%.+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[PR]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P:%.+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[SR]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S:%.+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[SADDR0:%.+]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S]], i32 [[IDX0:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR0:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP]], i32 [[IDX0]]
|
||||
// CHECK-DAG: [[PADDR0:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P]], i32 [[IDX0]]
|
||||
// CHECK-DAG: [[SADDR1:%.+]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S]], i32 [[IDX1:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR1:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP]], i32 [[IDX1]]
|
||||
// CHECK-DAG: [[PADDR1:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P]], i32 [[IDX1]]
|
||||
// CHECK-DAG: [[SADDR2:%.+]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S]], i32 [[IDX2:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR2:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP]], i32 [[IDX2]]
|
||||
// CHECK-DAG: [[PADDR2:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P]], i32 [[IDX2]]
|
||||
// CHECK-DAG: [[SADDR3:%.+]] = getelementptr inbounds [5 x i[[SZ]]], [5 x i[[SZ]]]* [[S]], i32 [[IDX3:[0-9]+]]
|
||||
// CHECK-DAG: [[BPADDR3:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[BP]], i32 [[IDX3]]
|
||||
// CHECK-DAG: [[PADDR3:%.+]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[P]], i32 [[IDX3]]
|
||||
|
||||
// The names below are not necessarily consistent with the names used for the
|
||||
// addresses above as some are repeated.
|
||||
// CHECK-DAG: [[BP0:%[^,]+]] = bitcast i[[SZ]]* [[VLA0]] to i8*
|
||||
// CHECK-DAG: [[P0:%[^,]+]] = bitcast i[[SZ]]* [[VLA0]] to i8*
|
||||
// CHECK-DAG: store i8* [[BP0]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P0]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP1:%[^,]+]] = bitcast i[[SZ]]* [[VLA1]] to i8*
|
||||
// CHECK-DAG: [[P1:%[^,]+]] = bitcast i[[SZ]]* [[VLA1]] to i8*
|
||||
// CHECK-DAG: store i8* [[BP1]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P1]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] {{4|8}}, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP2:%[^,]+]] = bitcast i32* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P2:%[^,]+]] = bitcast i32* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP2]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P2]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] 4, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP3:%[^,]+]] = bitcast [[S1]]* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P3:%[^,]+]] = bitcast [[S1]]* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP3]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P3]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] 8, i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK-DAG: [[BP4:%[^,]+]] = bitcast i16* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P4:%[^,]+]] = bitcast i16* %{{.+}} to i8*
|
||||
// CHECK-DAG: store i8* [[BP4]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i8* [[P4]], i8** {{%[^,]+}}
|
||||
// CHECK-DAG: store i[[SZ]] [[CSIZE]], i[[SZ]]* {{%[^,]+}}
|
||||
|
||||
// CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 4
|
||||
// CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
|
||||
// CHECK-NEXT: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
|
||||
// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:[^,]+]], label %[[END:[^,]+]]
|
||||
|
||||
// CHECK: [[FAIL]]
|
||||
// CHECK: call void [[HVT7:@.+]]({{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}})
|
||||
// CHECK-NEXT: br label %[[END]]
|
||||
// CHECK: [[END]]
|
||||
|
||||
//
|
||||
// CHECK: define {{.*}}[[FSTATIC]]
|
||||
//
|
||||
// CHECK: [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 50
|
||||
// CHECK: br i1 [[IF]], label %[[IFTHEN:[^,]+]], label %[[IFELSE:[^,]+]]
|
||||
// CHECK: [[IFTHEN]]
|
||||
// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 4, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* getelementptr inbounds ([4 x i[[SZ]]], [4 x i[[SZ]]]* [[SIZET6]], i32 0, i32 0), i32* getelementptr inbounds ([4 x i32], [4 x i32]* [[MAPT6]], i32 0, i32 0))
|
||||
// CHECK-DAG: [[BPR]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP:%.+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[PR]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P:%.+]], i32 0, i32 0
|
||||
|
||||
// CHECK-DAG: [[BPADDR0:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP]], i32 0, i32 0
|
||||
// CHECK-DAG: [[PADDR0:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P]], i32 0, i32 0
|
||||
// CHECK-DAG: store i8* [[BP0:%[^,]+]], i8** [[BPADDR0]]
|
||||
// CHECK-DAG: store i8* [[P0:%[^,]+]], i8** [[PADDR0]]
|
||||
// CHECK-DAG: [[BP0]] = bitcast i32* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P0]] = bitcast i32* %{{.+}} to i8*
|
||||
|
||||
// CHECK-DAG: [[BPADDR1:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP]], i32 0, i32 1
|
||||
// CHECK-DAG: [[PADDR1:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P]], i32 0, i32 1
|
||||
// CHECK-DAG: store i8* [[BP1:%[^,]+]], i8** [[BPADDR1]]
|
||||
// CHECK-DAG: store i8* [[P1:%[^,]+]], i8** [[PADDR1]]
|
||||
// CHECK-DAG: [[BP1]] = bitcast i16* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P1]] = bitcast i16* %{{.+}} to i8*
|
||||
|
||||
// CHECK-DAG: [[BPADDR2:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP]], i32 0, i32 2
|
||||
// CHECK-DAG: [[PADDR2:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P]], i32 0, i32 2
|
||||
// CHECK-DAG: store i8* [[BP2:%[^,]+]], i8** [[BPADDR2]]
|
||||
// CHECK-DAG: store i8* [[P2:%[^,]+]], i8** [[PADDR2]]
|
||||
|
||||
// CHECK-DAG: [[BPADDR3:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[BP]], i32 0, i32 3
|
||||
// CHECK-DAG: [[PADDR3:%.+]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[P]], i32 0, i32 3
|
||||
// CHECK-DAG: store i8* [[BP3:%[^,]+]], i8** [[BPADDR3]]
|
||||
// CHECK-DAG: store i8* [[P3:%[^,]+]], i8** [[PADDR3]]
|
||||
// CHECK-DAG: [[BP3]] = bitcast [10 x i32]* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P3]] = bitcast [10 x i32]* %{{.+}} to i8*
|
||||
|
||||
// CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 4
|
||||
// CHECK-NEXT: br label %[[IFEND:.+]]
|
||||
|
||||
// CHECK: [[IFELSE]]
|
||||
// CHECK: store i32 -1, i32* [[RHV]], align 4
|
||||
// CHECK-NEXT: br label %[[IFEND:.+]]
|
||||
|
||||
// CHECK: [[IFEND]]
|
||||
// CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
|
||||
// CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
|
||||
// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
|
||||
// CHECK: [[FAIL]]
|
||||
// CHECK: call void [[HVT6:@.+]]({{[^,]+}}, {{[^,]+}}, {{[^,]+}}, {{[^,]+}})
|
||||
// CHECK-NEXT: br label %[[END]]
|
||||
// CHECK: [[END]]
|
||||
|
||||
//
|
||||
// CHECK: define {{.*}}[[FTEMPLATE]]
|
||||
//
|
||||
// CHECK: [[IF:%.+]] = icmp sgt i32 {{[^,]+}}, 40
|
||||
// CHECK: br i1 [[IF]], label %[[IFTHEN:[^,]+]], label %[[IFELSE:[^,]+]]
|
||||
// CHECK: [[IFTHEN]]
|
||||
// CHECK-DAG: [[RET:%.+]] = call i32 @__tgt_target(i32 -1, i8* @{{[^,]+}}, i32 3, i8** [[BPR:%[^,]+]], i8** [[PR:%[^,]+]], i[[SZ]]* getelementptr inbounds ([3 x i[[SZ]]], [3 x i[[SZ]]]* [[SIZET5]], i32 0, i32 0), i32* getelementptr inbounds ([3 x i32], [3 x i32]* [[MAPT5]], i32 0, i32 0))
|
||||
// CHECK-DAG: [[BPR]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BP:%.+]], i32 0, i32 0
|
||||
// CHECK-DAG: [[PR]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[P:%.+]], i32 0, i32 0
|
||||
|
||||
// CHECK-DAG: [[BPADDR0:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BP]], i32 0, i32 0
|
||||
// CHECK-DAG: [[PADDR0:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[P]], i32 0, i32 0
|
||||
// CHECK-DAG: store i8* [[BP0:%[^,]+]], i8** [[BPADDR0]]
|
||||
// CHECK-DAG: store i8* [[P0:%[^,]+]], i8** [[PADDR0]]
|
||||
// CHECK-DAG: [[BP0]] = bitcast i32* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P0]] = bitcast i32* %{{.+}} to i8*
|
||||
|
||||
// CHECK-DAG: [[BPADDR1:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BP]], i32 0, i32 1
|
||||
// CHECK-DAG: [[PADDR1:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[P]], i32 0, i32 1
|
||||
// CHECK-DAG: store i8* [[BP1:%[^,]+]], i8** [[BPADDR1]]
|
||||
// CHECK-DAG: store i8* [[P1:%[^,]+]], i8** [[PADDR1]]
|
||||
// CHECK-DAG: [[BP1]] = bitcast i16* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P1]] = bitcast i16* %{{.+}} to i8*
|
||||
|
||||
// CHECK-DAG: [[BPADDR2:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[BP]], i32 0, i32 2
|
||||
// CHECK-DAG: [[PADDR2:%.+]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[P]], i32 0, i32 2
|
||||
// CHECK-DAG: store i8* [[BP2:%[^,]+]], i8** [[BPADDR2]]
|
||||
// CHECK-DAG: store i8* [[P2:%[^,]+]], i8** [[PADDR2]]
|
||||
// CHECK-DAG: [[BP2]] = bitcast [10 x i32]* %{{.+}} to i8*
|
||||
// CHECK-DAG: [[P2]] = bitcast [10 x i32]* %{{.+}} to i8*
|
||||
|
||||
// CHECK: store i32 [[RET]], i32* [[RHV:%.+]], align 4
|
||||
// CHECK-NEXT: br label %[[IFEND:.+]]
|
||||
|
||||
// CHECK: [[IFELSE]]
|
||||
// CHECK: store i32 -1, i32* [[RHV]], align 4
|
||||
// CHECK-NEXT: br label %[[IFEND:.+]]
|
||||
|
||||
// CHECK: [[IFEND]]
|
||||
// CHECK: [[RET2:%.+]] = load i32, i32* [[RHV]], align 4
|
||||
// CHECK: [[ERROR:%.+]] = icmp ne i32 [[RET2]], 0
|
||||
// CHECK-NEXT: br i1 [[ERROR]], label %[[FAIL:.+]], label %[[END:[^,]+]]
|
||||
// CHECK: [[FAIL]]
|
||||
// CHECK: call void [[HVT5:@.+]]({{[^,]+}}, {{[^,]+}}, {{[^,]+}})
|
||||
// CHECK-NEXT: br label %[[END]]
|
||||
// CHECK: [[END]]
|
||||
|
||||
|
||||
|
||||
// Check that the offloading functions are emitted and that the arguments are
|
||||
// correct and loaded correctly for the target regions of the callees of bar().
|
||||
|
||||
// CHECK: define internal void [[HVT7]]
|
||||
// Create local storage for each capture.
|
||||
// CHECK-DAG: [[LOCAL_THIS:%.+]] = alloca [[S1]]*
|
||||
// CHECK-DAG: [[LOCAL_B:%.+]] = alloca i32*
|
||||
// CHECK-DAG: [[LOCAL_VLA1:%.+]] = alloca i[[SZ]]*
|
||||
// CHECK-DAG: [[LOCAL_VLA2:%.+]] = alloca i[[SZ]]*
|
||||
// CHECK-DAG: [[LOCAL_C:%.+]] = alloca i16*
|
||||
// CHECK-DAG: store [[S1]]* [[ARG_THIS:%.+]], [[S1]]** [[LOCAL_THIS]]
|
||||
// CHECK-DAG: store i32* [[ARG_B:%.+]], i32** [[LOCAL_B]]
|
||||
// CHECK-DAG: store i[[SZ]]* [[ARG_VLA1:%.+]], i[[SZ]]** [[LOCAL_VLA1]]
|
||||
// CHECK-DAG: store i[[SZ]]* [[ARG_VLA2:%.+]], i[[SZ]]** [[LOCAL_VLA2]]
|
||||
// CHECK-DAG: store i16* [[ARG_C:%.+]], i16** [[LOCAL_C]]
|
||||
// Store captures in the context.
|
||||
// CHECK-DAG: [[REF_THIS:%.+]] = load [[S1]]*, [[S1]]** [[LOCAL_THIS]],
|
||||
// CHECK-DAG: [[REF_B:%.+]] = load i32*, i32** [[LOCAL_B]],
|
||||
// CHECK-DAG: [[REF_VLA1:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA1]],
|
||||
// CHECK-DAG: [[VAL_VLA1:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA1]],
|
||||
// CHECK-DAG: [[REF_VLA2:%.+]] = load i[[SZ]]*, i[[SZ]]** [[LOCAL_VLA2]],
|
||||
// CHECK-DAG: [[VAL_VLA2:%.+]] = load i[[SZ]], i[[SZ]]* [[REF_VLA2]],
|
||||
// CHECK-DAG: [[REF_C:%.+]] = load i16*, i16** [[LOCAL_C]],
|
||||
// Use captures.
|
||||
// CHECK-DAG: getelementptr inbounds [[S1]], [[S1]]* [[REF_THIS]], i32 0, i32 0
|
||||
// CHECK-DAG: load i32, i32* [[REF_B]]
|
||||
// CHECK-DAG: getelementptr inbounds i16, i16* [[REF_C]], i[[SZ]] %{{.+}}
|
||||
|
||||
|
||||
// CHECK: define internal void [[HVT6]]
|
||||
// Create local storage for each capture.
|
||||
// CHECK-DAG: [[LOCAL_A:%.+]] = alloca i32*
|
||||
// CHECK-DAG: [[LOCAL_AA:%.+]] = alloca i16*
|
||||
// CHECK-DAG: [[LOCAL_AAA:%.+]] = alloca i8*
|
||||
// CHECK-DAG: [[LOCAL_B:%.+]] = alloca [10 x i32]*
|
||||
// CHECK-DAG: store i32* [[ARG_A:%.+]], i32** [[LOCAL_A]]
|
||||
// CHECK-DAG: store i16* [[ARG_AA:%.+]], i16** [[LOCAL_AA]]
|
||||
// CHECK-DAG: store i8* [[ARG_AAA:%.+]], i8** [[LOCAL_AAA]]
|
||||
// CHECK-DAG: store [10 x i32]* [[ARG_B:%.+]], [10 x i32]** [[LOCAL_B]]
|
||||
// Store captures in the context.
|
||||
// CHECK-DAG: [[REF_A:%.+]] = load i32*, i32** [[LOCAL_A]],
|
||||
// CHECK-DAG: [[REF_AA:%.+]] = load i16*, i16** [[LOCAL_AA]],
|
||||
// CHECK-DAG: [[REF_AAA:%.+]] = load i8*, i8** [[LOCAL_AAA]],
|
||||
// CHECK-DAG: [[REF_B:%.+]] = load [10 x i32]*, [10 x i32]** [[LOCAL_B]],
|
||||
// Use captures.
|
||||
// CHECK-DAG: load i32, i32* [[REF_A]]
|
||||
// CHECK-DAG: load i16, i16* [[REF_AA]]
|
||||
// CHECK-DAG: load i8, i8* [[REF_AAA]]
|
||||
// CHECK-DAG: getelementptr inbounds [10 x i32], [10 x i32]* [[REF_B]], i[[SZ]] 0, i[[SZ]] 2
|
||||
|
||||
// CHECK: define internal void [[HVT5]]
|
||||
// Create local storage for each capture.
|
||||
// CHECK-DAG: [[LOCAL_A:%.+]] = alloca i32*
|
||||
// CHECK-DAG: [[LOCAL_AA:%.+]] = alloca i16*
|
||||
// CHECK-DAG: [[LOCAL_B:%.+]] = alloca [10 x i32]*
|
||||
// CHECK-DAG: store i32* [[ARG_A:%.+]], i32** [[LOCAL_A]]
|
||||
// CHECK-DAG: store i16* [[ARG_AA:%.+]], i16** [[LOCAL_AA]]
|
||||
// CHECK-DAG: store [10 x i32]* [[ARG_B:%.+]], [10 x i32]** [[LOCAL_B]]
|
||||
// Store captures in the context.
|
||||
// CHECK-DAG: [[REF_A:%.+]] = load i32*, i32** [[LOCAL_A]],
|
||||
// CHECK-DAG: [[REF_AA:%.+]] = load i16*, i16** [[LOCAL_AA]],
|
||||
// CHECK-DAG: [[REF_B:%.+]] = load [10 x i32]*, [10 x i32]** [[LOCAL_B]],
|
||||
// Use captures.
|
||||
// CHECK-DAG: load i32, i32* [[REF_A]]
|
||||
// CHECK-DAG: load i16, i16* [[REF_AA]]
|
||||
// CHECK-DAG: getelementptr inbounds [10 x i32], [10 x i32]* [[REF_B]], i[[SZ]] 0, i[[SZ]] 2
|
||||
#endif
|
||||
Loading…
Reference in New Issue