[GlobalISel] Add a localizer pass for target to use

This reverts commit r299287 plus clean-ups.

The localizer pass is a helper pass that could be run at O0 in the GISel
pipeline to work around the deficiency of the fast register allocator.
It basically shortens the live-ranges of the constants so that the
allocator does not spill all over the place.

Long term fix would be to make the greedy allocator fast.

llvm-svn: 304051
This commit is contained in:
Quentin Colombet 2017-05-27 01:34:00 +00:00
parent 5bbb5aafc1
commit bece442bd8
7 changed files with 523 additions and 0 deletions

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@ -0,0 +1,78 @@
//== llvm/CodeGen/GlobalISel/Localizer.h - Localizer -------------*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
/// \file This file describes the interface of the Localizer pass.
/// This pass moves/duplicates constant-like instructions close to their uses.
/// Its primarily goal is to workaround the deficiencies of the fast register
/// allocator.
/// With GlobalISel constants are all materialized in the entry block of
/// a function. However, the fast allocator cannot rematerialize constants and
/// has a lot more live-ranges to deal with and will most likely end up
/// spilling a lot.
/// By pushing the constants close to their use, we only create small
/// live-ranges.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LOCALIZER_H
#define LLVM_CODEGEN_GLOBALISEL_LOCALIZER_H
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
namespace llvm {
// Forward declarations.
class MachineRegisterInfo;
/// This pass implements the localization mechanism described at the
/// top of this file. One specificity of the implementation is that
/// it will materialize one and only one instance of a constant per
/// basic block, thus enabling reuse of that constant within that block.
/// Moreover, it only materializes constants in blocks where they
/// are used. PHI uses are considered happening at the end of the
/// related predecessor.
class Localizer : public MachineFunctionPass {
public:
static char ID;
private:
/// MRI contains all the register class/bank information that this
/// pass uses and updates.
MachineRegisterInfo *MRI;
/// Check whether or not \p MI needs to be moved close to its uses.
static bool shouldLocalize(const MachineInstr &MI);
/// Check if \p MOUse is used in the same basic block as \p Def.
/// If the use is in the same block, we say it is local.
/// When the use is not local, \p InsertMBB will contain the basic
/// block when to insert \p Def to have a local use.
static bool isLocalUse(MachineOperand &MOUse, const MachineInstr &Def,
MachineBasicBlock *&InsertMBB);
/// Initialize the field members using \p MF.
void init(MachineFunction &MF);
public:
Localizer();
StringRef getPassName() const override { return "Localizer"; }
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties()
.set(MachineFunctionProperties::Property::IsSSA)
.set(MachineFunctionProperties::Property::Legalized)
.set(MachineFunctionProperties::Property::RegBankSelected);
}
bool runOnMachineFunction(MachineFunction &MF) override;
};
} // End namespace llvm.
#endif

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@ -642,6 +642,11 @@ public:
///
void setRegBank(unsigned Reg, const RegisterBank &RegBank);
void setRegClassOrRegBank(unsigned Reg,
const RegClassOrRegBank &RCOrRB){
VRegInfo[Reg].first = RCOrRB;
}
/// constrainRegClass - Constrain the register class of the specified virtual
/// register to be a common subclass of RC and the current register class,
/// but only if the new class has at least MinNumRegs registers. Return the

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@ -194,6 +194,7 @@ void initializeLiveVariablesPass(PassRegistry&);
void initializeLoadCombinePass(PassRegistry&);
void initializeLoadStoreVectorizerPass(PassRegistry&);
void initializeLoaderPassPass(PassRegistry&);
void initializeLocalizerPass(PassRegistry&);
void initializeLocalStackSlotPassPass(PassRegistry&);
void initializeLoopAccessLegacyAnalysisPass(PassRegistry&);
void initializeLoopDataPrefetchLegacyPassPass(PassRegistry&);

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@ -8,6 +8,7 @@ set(GLOBAL_ISEL_FILES
LegalizerHelper.cpp
Legalizer.cpp
LegalizerInfo.cpp
Localizer.cpp
RegBankSelect.cpp
RegisterBank.cpp
RegisterBankInfo.cpp

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@ -26,6 +26,7 @@ void llvm::initializeGlobalISel(PassRegistry &Registry) {
void llvm::initializeGlobalISel(PassRegistry &Registry) {
initializeIRTranslatorPass(Registry);
initializeLegalizerPass(Registry);
initializeLocalizerPass(Registry);
initializeRegBankSelectPass(Registry);
initializeInstructionSelectPass(Registry);
}

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@ -0,0 +1,125 @@
//===- Localizer.cpp ---------------------- Localize some instrs -*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
/// \file
/// This file implements the Localizer class.
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/GlobalISel/Localizer.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
#define DEBUG_TYPE "localizer"
using namespace llvm;
char Localizer::ID = 0;
INITIALIZE_PASS(Localizer, DEBUG_TYPE,
"Move/duplicate certain instructions close to their use", false,
false);
Localizer::Localizer() : MachineFunctionPass(ID) {
initializeLocalizerPass(*PassRegistry::getPassRegistry());
}
void Localizer::init(MachineFunction &MF) { MRI = &MF.getRegInfo(); }
bool Localizer::shouldLocalize(const MachineInstr &MI) {
switch (MI.getOpcode()) {
default:
return false;
// Constants-like instructions should be close to their users.
// We don't want long live-ranges for them.
case TargetOpcode::G_CONSTANT:
case TargetOpcode::G_FCONSTANT:
case TargetOpcode::G_FRAME_INDEX:
return true;
}
}
bool Localizer::isLocalUse(MachineOperand &MOUse, const MachineInstr &Def,
MachineBasicBlock *&InsertMBB) {
MachineInstr &MIUse = *MOUse.getParent();
InsertMBB = MIUse.getParent();
if (MIUse.isPHI())
InsertMBB = MIUse.getOperand(MIUse.getOperandNo(&MOUse) + 1).getMBB();
return InsertMBB == Def.getParent();
}
bool Localizer::runOnMachineFunction(MachineFunction &MF) {
// If the ISel pipeline failed, do not bother running that pass.
if (MF.getProperties().hasProperty(
MachineFunctionProperties::Property::FailedISel))
return false;
DEBUG(dbgs() << "Localize instructions for: " << MF.getName() << '\n');
init(MF);
bool Changed = false;
// Keep track of the instructions we localized.
// We won't need to process them if we see them later in the CFG.
SmallPtrSet<MachineInstr *, 16> LocalizedInstrs;
DenseMap<std::pair<MachineBasicBlock *, unsigned>, unsigned> MBBWithLocalDef;
// TODO: Do bottom up traversal.
for (MachineBasicBlock &MBB : MF) {
for (MachineInstr &MI : MBB) {
if (LocalizedInstrs.count(&MI) || !shouldLocalize(MI))
continue;
DEBUG(dbgs() << "Should localize: " << MI);
assert(MI.getDesc().getNumDefs() == 1 &&
"More than one definition not supported yet");
unsigned Reg = MI.getOperand(0).getReg();
// Check if all the users of MI are local.
// We are going to invalidation the list of use operands, so we
// can't use range iterator.
for (auto MOIt = MRI->use_begin(Reg), MOItEnd = MRI->use_end();
MOIt != MOItEnd;) {
MachineOperand &MOUse = *MOIt++;
// Check if the use is already local.
MachineBasicBlock *InsertMBB;
DEBUG(MachineInstr &MIUse = *MOUse.getParent();
dbgs() << "Checking use: " << MIUse
<< " #Opd: " << MIUse.getOperandNo(&MOUse) << '\n');
if (isLocalUse(MOUse, MI, InsertMBB))
continue;
DEBUG(dbgs() << "Fixing non-local use\n");
Changed = true;
auto MBBAndReg = std::make_pair(InsertMBB, Reg);
auto NewVRegIt = MBBWithLocalDef.find(MBBAndReg);
if (NewVRegIt == MBBWithLocalDef.end()) {
// Create the localized instruction.
MachineInstr *LocalizedMI = MF.CloneMachineInstr(&MI);
LocalizedInstrs.insert(LocalizedMI);
// Move it at the right place.
MachineInstr &MIUse = *MOUse.getParent();
if (MIUse.getParent() == InsertMBB)
InsertMBB->insert(MIUse, LocalizedMI);
else
InsertMBB->insert(InsertMBB->getFirstNonPHI(), LocalizedMI);
// Set a new register for the definition.
unsigned NewReg =
MRI->createGenericVirtualRegister(MRI->getType(Reg));
MRI->setRegClassOrRegBank(NewReg, MRI->getRegClassOrRegBank(Reg));
LocalizedMI->getOperand(0).setReg(NewReg);
NewVRegIt =
MBBWithLocalDef.insert(std::make_pair(MBBAndReg, NewReg)).first;
DEBUG(dbgs() << "Inserted: " << *LocalizedMI);
}
DEBUG(dbgs() << "Update use with: " << PrintReg(NewVRegIt->second)
<< '\n');
// Update the user reg.
MOUse.setReg(NewVRegIt->second);
}
}
}
return Changed;
}

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@ -0,0 +1,312 @@
# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=localizer -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK
# Test the localizer.
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
define void @local_use() { ret void }
define void @non_local_1use() { ret void }
define void @non_local_2uses() { ret void }
define void @non_local_phi_use() { ret void }
define void @non_local_phi_use_followed_by_use() { ret void }
define void @non_local_phi_use_followed_by_use_fi() { ret void }
define void @float_non_local_phi_use_followed_by_use_fi() { ret void }
...
---
# CHECK-LABEL: name: local_use
name: local_use
legalized: true
regBankSelected: true
# CHECK: registers:
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# CHECK: body:
# CHECK: %0(s32) = G_CONSTANT 1
# CHECK-NEXT: %1(s32) = G_ADD %0, %0
body: |
bb.0:
%0(s32) = G_CONSTANT 1
%1(s32) = G_ADD %0, %0
...
---
# CHECK-LABEL: name: non_local_1use
name: non_local_1use
legalized: true
regBankSelected: true
# CHECK: registers:
# Existing registers should be left untouched
# CHECK: - { id: 0, class: gpr }
#CHECK-NEXT: - { id: 1, class: gpr }
#CHECK-NEXT: - { id: 2, class: gpr }
# The newly created reg should be on the same regbank/regclass as its origin.
#CHECK-NEXT: - { id: 3, class: gpr }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# CHECK: body:
# CHECK: %0(s32) = G_CONSTANT 1
# CHECK-NEXT: %1(s32) = G_ADD %0, %0
# CHECK: bb.1:
# CHECK: %3(s32) = G_CONSTANT 1
# CHECK-NEXT: %2(s32) = G_ADD %3, %1
body: |
bb.0:
successors: %bb.1
%0(s32) = G_CONSTANT 1
%1(s32) = G_ADD %0, %0
bb.1:
%2(s32) = G_ADD %0, %1
...
---
# CHECK-LABEL: name: non_local_2uses
name: non_local_2uses
legalized: true
regBankSelected: true
# CHECK: registers:
# Existing registers should be left untouched
# CHECK: - { id: 0, class: gpr }
#CHECK-NEXT: - { id: 1, class: gpr }
#CHECK-NEXT: - { id: 2, class: gpr }
# The newly created reg should be on the same regbank/regclass as its origin.
#CHECK-NEXT: - { id: 3, class: gpr }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
# CHECK: body:
# CHECK: %0(s32) = G_CONSTANT 1
# CHECK-NEXT: %1(s32) = G_ADD %0, %0
# CHECK: bb.1:
# CHECK: %3(s32) = G_CONSTANT 1
# CHECK-NEXT: %2(s32) = G_ADD %3, %3
body: |
bb.0:
successors: %bb.1
%0(s32) = G_CONSTANT 1
%1(s32) = G_ADD %0, %0
bb.1:
%2(s32) = G_ADD %0, %0
...
---
# CHECK-LABEL: name: non_local_phi_use
name: non_local_phi_use
legalized: true
regBankSelected: true
tracksRegLiveness: true
# CHECK: registers:
# Existing registers should be left untouched
# CHECK: - { id: 0, class: gpr }
#CHECK-NEXT: - { id: 1, class: gpr }
#CHECK-NEXT: - { id: 2, class: gpr }
#CHECK-NEXT: - { id: 3, class: gpr }
#CHECK-NEXT: - { id: 4, class: gpr }
# The newly created reg should be on the same regbank/regclass as its origin.
#CHECK-NEXT: - { id: 5, class: gpr }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
- { id: 4, class: gpr }
# CHECK: body:
# CHECK: %0(s32) = G_CONSTANT 1
# CHECK-NEXT: %1(s32) = G_ADD %0, %0
# CHECK: bb.1:
# CHECK: %5(s32) = G_CONSTANT 1
# CHECK: bb.2:
# CHECK: %3(s32) = PHI %5(s32), %bb.1
body: |
bb.0:
successors: %bb.1
%0(s32) = G_CONSTANT 1
%1(s32) = G_ADD %0, %0
bb.1:
successors: %bb.2
bb.2:
%3(s32) = PHI %0(s32), %bb.1
%2(s32) = G_ADD %3, %3
...
---
# CHECK-LABEL: name: non_local_phi_use_followed_by_use
name: non_local_phi_use_followed_by_use
legalized: true
regBankSelected: true
tracksRegLiveness: true
# CHECK: registers:
# Existing registers should be left untouched
# CHECK: - { id: 0, class: gpr }
#CHECK-NEXT: - { id: 1, class: gpr }
#CHECK-NEXT: - { id: 2, class: gpr }
#CHECK-NEXT: - { id: 3, class: gpr }
#CHECK-NEXT: - { id: 4, class: gpr }
# The newly created regs should be on the same regbank/regclass as its origin.
#CHECK-NEXT: - { id: 5, class: gpr }
#CHECK-NEXT: - { id: 6, class: gpr }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
- { id: 4, class: gpr }
# CHECK: body:
# CHECK: %0(s32) = G_CONSTANT 1
# CHECK-NEXT: %1(s32) = G_ADD %0, %0
# CHECK: bb.1:
# CHECK: %5(s32) = G_CONSTANT 1
# CHECK: bb.2:
# CHECK: %3(s32) = PHI %5(s32), %bb.1
# CHECK-NEXT: %6(s32) = G_CONSTANT 1
# CHECK-NEXT: %2(s32) = G_ADD %3, %6
body: |
bb.0:
successors: %bb.1
%0(s32) = G_CONSTANT 1
%1(s32) = G_ADD %0, %0
bb.1:
successors: %bb.2
bb.2:
%3(s32) = PHI %0(s32), %bb.1
%2(s32) = G_ADD %3, %0
...
---
# CHECK-LABEL: name: non_local_phi_use_followed_by_use_fi
name: non_local_phi_use_followed_by_use_fi
legalized: true
regBankSelected: true
tracksRegLiveness: true
# CHECK: registers:
# Existing registers should be left untouched
# CHECK: - { id: 0, class: gpr }
#CHECK-NEXT: - { id: 1, class: gpr }
#CHECK-NEXT: - { id: 2, class: gpr }
#CHECK-NEXT: - { id: 3, class: gpr }
#CHECK-NEXT: - { id: 4, class: gpr }
# The newly created reg should be on the same regbank/regclass as its origin.
#CHECK-NEXT: - { id: 5, class: gpr }
#CHECK-NEXT: - { id: 6, class: gpr }
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
- { id: 4, class: gpr }
# CHECK: body:
# CHECK: %0(s32) = G_FRAME_INDEX 1
# CHECK-NEXT: %1(s32) = G_ADD %0, %0
# CHECK: bb.1:
# CHECK: %5(s32) = G_FRAME_INDEX 1
# CHECK: bb.2:
# CHECK: %3(s32) = PHI %5(s32), %bb.1
# CHECK-NEXT: %6(s32) = G_FRAME_INDEX 1
# CHECK-NEXT: %2(s32) = G_ADD %3, %6
body: |
bb.0:
successors: %bb.1
%0(s32) = G_FRAME_INDEX 1
%1(s32) = G_ADD %0, %0
bb.1:
successors: %bb.2
bb.2:
%3(s32) = PHI %0(s32), %bb.1
%2(s32) = G_ADD %3, %0
...
---
# CHECK-LABEL: name: float_non_local_phi_use_followed_by_use_fi
name: float_non_local_phi_use_followed_by_use_fi
legalized: true
regBankSelected: true
tracksRegLiveness: true
# CHECK: registers:
# Existing registers should be left untouched
# CHECK: - { id: 0, class: fpr }
#CHECK-NEXT: - { id: 1, class: fpr }
#CHECK-NEXT: - { id: 2, class: fpr }
#CHECK-NEXT: - { id: 3, class: fpr }
#CHECK-NEXT: - { id: 4, class: fpr }
# The newly created reg should be on the same regbank/regclass as its origin.
#CHECK-NEXT: - { id: 5, class: fpr }
#CHECK-NEXT: - { id: 6, class: fpr }
registers:
- { id: 0, class: fpr }
- { id: 1, class: fpr }
- { id: 2, class: fpr }
- { id: 3, class: fpr }
- { id: 4, class: fpr }
# CHECK: body:
# CHECK: %0(s32) = G_FCONSTANT float 1.0
# CHECK-NEXT: %1(s32) = G_FADD %0, %0
# CHECK: bb.1:
# CHECK: %5(s32) = G_FCONSTANT float 1.0
# CHECK: bb.2:
# CHECK: %3(s32) = PHI %5(s32), %bb.1
# CHECK-NEXT: %6(s32) = G_FCONSTANT float 1.0
# CHECK-NEXT: %2(s32) = G_FADD %3, %6
body: |
bb.0:
successors: %bb.1
%0(s32) = G_FCONSTANT float 1.0
%1(s32) = G_FADD %0, %0
bb.1:
successors: %bb.2
bb.2:
%3(s32) = PHI %0(s32), %bb.1
%2(s32) = G_FADD %3, %0
...