forked from OSchip/llvm-project
[ELF] Delete the RelExpr member R_HINT. NFC
R_HINT is ignored like R_NONE. There are no strong reasons to keep R_HINT. The largest RelExpr member R_RISCV_PC_INDIRECT is 60 now. Differential Revision: https://reviews.llvm.org/D71822
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@ -140,7 +140,7 @@ RelExpr ARM::getRelExpr(RelType type, const Symbol &s,
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// given address. It can be used to implement a special linker mode which
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// given address. It can be used to implement a special linker mode which
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// rewrites ARMv4T inputs to ARMv4. Since we support only ARMv4 input and
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// rewrites ARMv4T inputs to ARMv4. Since we support only ARMv4 input and
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// not ARMv4 output, we can just ignore it.
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// not ARMv4 output, we can just ignore it.
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return R_HINT;
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return R_NONE;
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default:
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default:
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return R_ABS;
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return R_ABS;
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}
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}
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@ -1250,8 +1250,8 @@ static void scanReloc(InputSectionBase &sec, OffsetGetter &getOffset, RelTy *&i,
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const uint8_t *relocatedAddr = sec.data().begin() + rel.r_offset;
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const uint8_t *relocatedAddr = sec.data().begin() + rel.r_offset;
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RelExpr expr = target->getRelExpr(type, sym, relocatedAddr);
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RelExpr expr = target->getRelExpr(type, sym, relocatedAddr);
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// Ignore "hint" relocations because they are only markers for relaxation.
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// Ignore R_*_NONE and other marker relocations.
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if (oneof<R_HINT, R_NONE>(expr))
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if (expr == R_NONE)
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return;
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return;
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// We can separate the small code model relocations into 2 categories:
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// We can separate the small code model relocations into 2 categories:
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@ -40,7 +40,6 @@ enum RelExpr {
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R_GOTPLT,
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R_GOTPLT,
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R_GOTPLTREL,
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R_GOTPLTREL,
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R_GOTREL,
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R_GOTREL,
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R_HINT,
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R_NEG_TLS,
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R_NEG_TLS,
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R_NONE,
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R_NONE,
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R_PC,
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R_PC,
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