forked from OSchip/llvm-project
RuntimeDyldELF: add LDST128_ABS_LO12_NC reloc
llvm-svn: 292788
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@ -443,6 +443,12 @@ void RuntimeDyldELF::resolveAArch64Relocation(const SectionEntry &Section,
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// from bits 11:3 of X
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// from bits 11:3 of X
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or32AArch64Imm(TargetPtr, getBits(Value + Addend, 3, 11));
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or32AArch64Imm(TargetPtr, getBits(Value + Addend, 3, 11));
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break;
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break;
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case ELF::R_AARCH64_LDST128_ABS_LO12_NC:
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// Operation: S + A
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// Immediate goes in bits 21:10 of LD/ST instruction, taken
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// from bits 11:4 of X
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or32AArch64Imm(TargetPtr, getBits(Value + Addend, 4, 11));
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break;
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}
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}
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}
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}
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@ -28,6 +28,8 @@ l:
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ldr s4, [x5, :lo12:a]
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ldr s4, [x5, :lo12:a]
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# R_AARCH64_LDST64_ABS_LO12_NC
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# R_AARCH64_LDST64_ABS_LO12_NC
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ldr x4, [x5, :lo12:a]
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ldr x4, [x5, :lo12:a]
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# R_AARCH64_LDST128_ABS_LO12_NC
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ldr q4, [x5, :lo12:a]
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p:
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p:
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# R_AARCH64_ADR_PREL_PG_HI21
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# R_AARCH64_ADR_PREL_PG_HI21
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# Test both low and high immediate values
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# Test both low and high immediate values
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@ -66,6 +68,7 @@ r:
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# rtdyld-check: (*{4}(l+4))[21:10] = (a+2)[11:1]
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# rtdyld-check: (*{4}(l+4))[21:10] = (a+2)[11:1]
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# rtdyld-check: (*{4}(l+8))[21:10] = a[11:2]
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# rtdyld-check: (*{4}(l+8))[21:10] = a[11:2]
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# rtdyld-check: (*{4}(l+12))[21:10] = a[11:3]
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# rtdyld-check: (*{4}(l+12))[21:10] = a[11:3]
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# rtdyld-check: (*{4}(l+16))[21:10] = a[11:4]
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## Check ADR_PREL_PG_HI21. Low order bits of immediate value
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## Check ADR_PREL_PG_HI21. Low order bits of immediate value
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## go to bits 30:29. High order bits go to bits 23:5
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## go to bits 30:29. High order bits go to bits 23:5
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