From be63e06de93c49476118f2169b526840842db67a Mon Sep 17 00:00:00 2001 From: Daniel Sanders Date: Wed, 19 Jul 2017 09:28:20 +0000 Subject: [PATCH] [globalisel][tablegen] 80-col corrections. llvm-svn: 308424 --- llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h index 59a4073646eb..1060d8fd667e 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h @@ -40,7 +40,8 @@ class TargetRegisterInfo; /// This is convenient because std::bitset does not have a constructor /// with an initializer list of set bits. /// -/// Each InstructionSelector subclass should define a PredicateBitset class with: +/// Each InstructionSelector subclass should define a PredicateBitset class +/// with: /// const unsigned MAX_SUBTARGET_PREDICATES = 192; /// using PredicateBitset = PredicateBitsetImpl; /// and updating the constant to suit the target. Tablegen provides a suitable @@ -102,7 +103,8 @@ enum { /// - OpIdx - Operand index /// - Expected integer GIM_CheckConstantInt, - /// Check the operand is a specific literal integer (i.e. MO.isImm() or MO.isCImm() is true). + /// Check the operand is a specific literal integer (i.e. MO.isImm() or + /// MO.isCImm() is true). /// - InsnID - Instruction ID /// - OpIdx - Operand index /// - Expected integer