forked from OSchip/llvm-project
[globalisel][tablegen] 80-col corrections.
llvm-svn: 308424
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@ -40,7 +40,8 @@ class TargetRegisterInfo;
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/// This is convenient because std::bitset does not have a constructor
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/// with an initializer list of set bits.
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///
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/// Each InstructionSelector subclass should define a PredicateBitset class with:
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/// Each InstructionSelector subclass should define a PredicateBitset class
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/// with:
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/// const unsigned MAX_SUBTARGET_PREDICATES = 192;
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/// using PredicateBitset = PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
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/// and updating the constant to suit the target. Tablegen provides a suitable
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@ -102,7 +103,8 @@ enum {
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/// - OpIdx - Operand index
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/// - Expected integer
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GIM_CheckConstantInt,
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/// Check the operand is a specific literal integer (i.e. MO.isImm() or MO.isCImm() is true).
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/// Check the operand is a specific literal integer (i.e. MO.isImm() or
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/// MO.isCImm() is true).
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/// - InsnID - Instruction ID
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/// - OpIdx - Operand index
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/// - Expected integer
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