maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Make F31 and D15 non-reserved registers. 

llvm-svn: 139420
This commit is contained in:
Akira Hatanaka 2011-09-09 22:11:26 +00:00
parent e74e0c8020
commit be159b5f2d
2 changed files with 1 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/lib/Target/Mips/MipsRegisterInfo.cpp
View File

@ -129,8 +129,6 @@ getReservedRegs(const MachineFunction &MF) const {
Reserved.set(Mips::SP);
Reserved.set(Mips::FP);
Reserved.set(Mips::RA);
Reserved.set(Mips::F31);
Reserved.set(Mips::D15);
return Reserved;
}

4
llvm/lib/Target/Mips/MipsRegisterInfo.td
View File

@ -182,9 +182,7 @@ def AFGR64 : RegisterClass<"Mips", [f64], 64, (add
// Not preserved across procedure calls
D2, D3, D4, D5, D8, D9,
// Callee save
D10, D11, D12, D13, D14,
// Reserved
D15)> {
D10, D11, D12, D13, D14, D15)> {
let SubRegClasses = [(FGR32 sub_fpeven, sub_fpodd)];
}