forked from OSchip/llvm-project
Generate test results for combine-fcopysign.ll using update_llc_test_checks.py . NFC
llvm-svn: 352285
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98217adb87
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be03018384
llvm/test/CodeGen/X86
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
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@ -15,7 +16,7 @@ define <4 x float> @combine_vec_fcopysign_pos_constant0(<4 x float> %x) {
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;
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; AVX-LABEL: combine_vec_fcopysign_pos_constant0:
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = call <4 x float> @llvm.copysign.v4f32(<4 x float> %x, <4 x float> <float 2.0, float 2.0, float 2.0, float 2.0>)
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@ -30,7 +31,7 @@ define <4 x float> @combine_vec_fcopysign_pos_constant1(<4 x float> %x) {
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;
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; AVX-LABEL: combine_vec_fcopysign_pos_constant1:
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = call <4 x float> @llvm.copysign.v4f32(<4 x float> %x, <4 x float> <float 0.0, float 2.0, float 4.0, float 8.0>)
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@ -45,7 +46,7 @@ define <4 x float> @combine_vec_fcopysign_fabs_sgn(<4 x float> %x, <4 x float> %
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;
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; AVX-LABEL: combine_vec_fcopysign_fabs_sgn:
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %y)
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@ -114,7 +115,7 @@ define <4 x float> @combine_vec_fcopysign_fabs_mag(<4 x float> %x, <4 x float> %
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
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; AVX-NEXT: vandps %xmm2, %xmm1, %xmm1
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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@ -136,7 +137,7 @@ define <4 x float> @combine_vec_fcopysign_fneg_mag(<4 x float> %x, <4 x float> %
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
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; AVX-NEXT: vandps %xmm2, %xmm1, %xmm1
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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@ -158,7 +159,7 @@ define <4 x float> @combine_vec_fcopysign_fcopysign_mag(<4 x float> %x, <4 x flo
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
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; AVX-NEXT: vandps %xmm2, %xmm1, %xmm1
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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@ -180,7 +181,7 @@ define <4 x float> @combine_vec_fcopysign_fcopysign_sgn(<4 x float> %x, <4 x flo
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
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; AVX-NEXT: vandps %xmm1, %xmm2, %xmm1
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandps %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vorps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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@ -198,7 +199,7 @@ define <4 x double> @combine_vec_fcopysign_fpext_sgn(<4 x double> %x, <4 x float
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; SSE-NEXT: cvtss2sd %xmm2, %xmm5
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; SSE-NEXT: movhlps {{.*#+}} xmm2 = xmm2[1,1]
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; SSE-NEXT: shufps {{.*#+}} xmm3 = xmm3[3,1,2,3]
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; SSE-NEXT: movaps {{.*#+}} xmm6
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; SSE-NEXT: movaps {{.*#+}} xmm6 = [NaN,NaN]
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; SSE-NEXT: cvtss2sd %xmm3, %xmm3
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; SSE-NEXT: movaps %xmm6, %xmm7
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; SSE-NEXT: andnps %xmm3, %xmm7
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@ -227,7 +228,7 @@ define <4 x double> @combine_vec_fcopysign_fpext_sgn(<4 x double> %x, <4 x float
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;
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; AVX-LABEL: combine_vec_fcopysign_fpext_sgn:
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastsd {{.*}}(%rip), %ymm2
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; AVX-NEXT: vbroadcastsd {{.*#+}} ymm2 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandps %ymm2, %ymm0, %ymm0
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; AVX-NEXT: vcvtps2pd %xmm1, %ymm1
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; AVX-NEXT: vbroadcastsd {{.*#+}} ymm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
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@ -245,7 +246,7 @@ define <4 x float> @combine_vec_fcopysign_fptrunc_sgn(<4 x float> %x, <4 x doubl
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; SSE: # %bb.0:
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; SSE-NEXT: movaps %xmm0, %xmm3
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; SSE-NEXT: unpckhpd {{.*#+}} xmm3 = xmm3[1],xmm0[1]
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; SSE-NEXT: movaps {{.*#+}} xmm4
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; SSE-NEXT: movaps {{.*#+}} xmm4 = [NaN,NaN,NaN,NaN]
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; SSE-NEXT: andps %xmm4, %xmm3
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; SSE-NEXT: cvtsd2ss %xmm2, %xmm5
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; SSE-NEXT: movaps %xmm4, %xmm6
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@ -279,7 +280,7 @@ define <4 x float> @combine_vec_fcopysign_fptrunc_sgn(<4 x float> %x, <4 x doubl
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;
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; AVX-LABEL: combine_vec_fcopysign_fptrunc_sgn:
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; AVX: # %bb.0:
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; AVX-NEXT: vbroadcastss {{.*}}(%rip), %xmm2
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [NaN,NaN,NaN,NaN]
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; AVX-NEXT: vandpd %xmm2, %xmm0, %xmm0
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; AVX-NEXT: vcvtpd2ps %ymm1, %xmm1
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; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
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