From bdce3885c4e1c1b96d30cf76d005d661401fbe03 Mon Sep 17 00:00:00 2001 From: Sean Callanan Date: Sat, 4 Feb 2012 07:45:35 +0000 Subject: [PATCH] Modified the Enhanced Disassembler to create and cache disassemblers according to the string value of the target triple, not according to the enum of the triple CPU. The reason for this is that certain attributes of the instruction set are not reflected in the enum, but only in the string. llvm-svn: 149773 --- llvm/lib/MC/MCDisassembler/EDDisassembler.cpp | 42 ++++++++++--------- llvm/lib/MC/MCDisassembler/EDDisassembler.h | 13 +++--- llvm/lib/MC/MCDisassembler/EDOperand.cpp | 16 ++++--- 3 files changed, 40 insertions(+), 31 deletions(-) diff --git a/llvm/lib/MC/MCDisassembler/EDDisassembler.cpp b/llvm/lib/MC/MCDisassembler/EDDisassembler.cpp index 46869dac7683..c7221d86a86e 100644 --- a/llvm/lib/MC/MCDisassembler/EDDisassembler.cpp +++ b/llvm/lib/MC/MCDisassembler/EDDisassembler.cpp @@ -95,16 +95,23 @@ static int getLLVMSyntaxVariant(Triple::ArchType arch, EDDisassembler *EDDisassembler::getDisassembler(Triple::ArchType arch, AssemblySyntax syntax) { + const char *triple = tripleFromArch(arch); + return getDisassembler(StringRef(triple), syntax); +} + +EDDisassembler *EDDisassembler::getDisassembler(StringRef str, + AssemblySyntax syntax) { CPUKey key; - key.Arch = arch; + key.Triple = str.str(); key.Syntax = syntax; EDDisassembler::DisassemblerMap_t::iterator i = sDisassemblers.find(key); - + if (i != sDisassemblers.end()) { - return i->second; - } else { - EDDisassembler* sdd = new EDDisassembler(key); + return i->second; + } + else { + EDDisassembler *sdd = new EDDisassembler(key); if (!sdd->valid()) { delete sdd; return NULL; @@ -116,10 +123,7 @@ EDDisassembler *EDDisassembler::getDisassembler(Triple::ArchType arch, } return NULL; -} - -EDDisassembler *EDDisassembler::getDisassembler(StringRef str, - AssemblySyntax syntax) { + return getDisassembler(Triple(str).getArch(), syntax); } @@ -127,21 +131,20 @@ EDDisassembler::EDDisassembler(CPUKey &key) : Valid(false), HasSemantics(false), ErrorStream(nulls()), - Key(key) { - const char *triple = tripleFromArch(key.Arch); - - if (!triple) + Key(key), + TgtTriple(key.Triple.c_str()) { + if (TgtTriple.getArch() == Triple::InvalidArch) return; - LLVMSyntaxVariant = getLLVMSyntaxVariant(key.Arch, key.Syntax); + LLVMSyntaxVariant = getLLVMSyntaxVariant(TgtTriple.getArch(), key.Syntax); if (LLVMSyntaxVariant < 0) return; - std::string tripleString(triple); + std::string tripleString(key.Triple); std::string errorString; - Tgt = TargetRegistry::lookupTarget(tripleString, + Tgt = TargetRegistry::lookupTarget(key.Triple, errorString); if (!Tgt) @@ -260,7 +263,7 @@ void EDDisassembler::initMaps(const MCRegisterInfo ®isterInfo) { RegRMap[registerName] = registerIndex; } - switch (Key.Arch) { + switch (TgtTriple.getArch()) { default: break; case Triple::x86: @@ -328,7 +331,7 @@ int EDDisassembler::parseInst(SmallVectorImpl &operands, const std::string &str) { int ret = 0; - switch (Key.Arch) { + switch (TgtTriple.getArch()) { default: return -1; case Triple::x86: @@ -353,8 +356,7 @@ int EDDisassembler::parseInst(SmallVectorImpl &operands, context, *streamer, *AsmInfo)); - StringRef triple = tripleFromArch(Key.Arch); - OwningPtr STI(Tgt->createMCSubtargetInfo(triple, "", "")); + OwningPtr STI(Tgt->createMCSubtargetInfo(Key.Triple.c_str(), "", "")); OwningPtr TargetParser(Tgt->createMCAsmParser(*STI, *genericParser)); diff --git a/llvm/lib/MC/MCDisassembler/EDDisassembler.h b/llvm/lib/MC/MCDisassembler/EDDisassembler.h index 97c2d1fd99b7..e97f11d44c1d 100644 --- a/llvm/lib/MC/MCDisassembler/EDDisassembler.h +++ b/llvm/lib/MC/MCDisassembler/EDDisassembler.h @@ -25,6 +25,7 @@ #include #include +#include #include namespace llvm { @@ -74,21 +75,21 @@ struct EDDisassembler { /// pair struct CPUKey { /// The architecture type - llvm::Triple::ArchType Arch; + std::string Triple; /// The assembly syntax AssemblySyntax Syntax; /// operator== - Equality operator bool operator==(const CPUKey &key) const { - return (Arch == key.Arch && + return (Triple == key.Triple && Syntax == key.Syntax); } /// operator< - Less-than operator bool operator<(const CPUKey &key) const { - return ((Arch < key.Arch) || - ((Arch == key.Arch) && Syntax < (key.Syntax))); + return ((Triple < key.Triple) || + ((Triple == key.Triple) && Syntax < (key.Syntax))); } }; @@ -126,8 +127,10 @@ struct EDDisassembler { /// The stream to write errors to llvm::raw_ostream &ErrorStream; - /// The architecture/syntax pair for the current architecture + /// The triple/syntax pair for the current architecture CPUKey Key; + /// The Triple fur the current architecture + Triple TgtTriple; /// The LLVM target corresponding to the disassembler const llvm::Target *Tgt; /// The assembly information for the target architecture diff --git a/llvm/lib/MC/MCDisassembler/EDOperand.cpp b/llvm/lib/MC/MCDisassembler/EDOperand.cpp index 9aededb676e4..48b374659d5e 100644 --- a/llvm/lib/MC/MCDisassembler/EDOperand.cpp +++ b/llvm/lib/MC/MCDisassembler/EDOperand.cpp @@ -30,8 +30,10 @@ EDOperand::EDOperand(const EDDisassembler &disassembler, MCOpIndex(mcOpIndex) { unsigned int numMCOperands = 0; - if (Disassembler.Key.Arch == Triple::x86 || - Disassembler.Key.Arch == Triple::x86_64) { + Triple::ArchType arch = Disassembler.TgtTriple.getArch(); + + if (arch == Triple::x86 || + arch == Triple::x86_64) { uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex]; switch (operandType) { @@ -54,8 +56,8 @@ EDOperand::EDOperand(const EDDisassembler &disassembler, break; } } - else if (Disassembler.Key.Arch == Triple::arm || - Disassembler.Key.Arch == Triple::thumb) { + else if (arch == Triple::arm || + arch == Triple::thumb) { uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex]; switch (operandType) { @@ -126,7 +128,9 @@ int EDOperand::evaluate(uint64_t &result, void *arg) { uint8_t operandType = Inst.ThisInstInfo->operandTypes[OpIndex]; - switch (Disassembler.Key.Arch) { + Triple::ArchType arch = Disassembler.TgtTriple.getArch(); + + switch (arch) { default: return -1; case Triple::x86: @@ -168,7 +172,7 @@ int EDOperand::evaluate(uint64_t &result, unsigned segmentReg = Inst.Inst->getOperand(MCOpIndex+4).getReg(); - if (segmentReg != 0 && Disassembler.Key.Arch == Triple::x86_64) { + if (segmentReg != 0 && arch == Triple::x86_64) { unsigned fsID = Disassembler.registerIDWithName("FS"); unsigned gsID = Disassembler.registerIDWithName("GS");