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[GlobalISel] Add IRTranslator support for G_FNEARBYINT 

Translate llvm.nearbyint into G_FNEARBYINT as a simple intrinsic. Update
arm64-irtranslator.ll.

Differential Revision: https://reviews.llvm.org/D60922

llvm-svn: 359203
This commit is contained in:
Jessica Paquette 2019-04-25 16:39:28 +00:00
parent 79e7e439e5
commit bd7ac30b15
2 changed files with 10 additions and 0 deletions
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2
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
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@ -788,6 +788,8 @@ unsigned IRTranslator::getSimpleIntrinsicOpcode(Intrinsic::ID ID) {
return TargetOpcode::G_FLOG2;
case Intrinsic::log10:
return TargetOpcode::G_FLOG10;
case Intrinsic::nearbyint:
return TargetOpcode::G_FNEARBYINT;
case Intrinsic::pow:
return TargetOpcode::G_FPOW;
case Intrinsic::rint:

8
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
View File

@ -2333,6 +2333,14 @@ define float @test_floor_f32(float %x) {
ret float %y
}
declare float @llvm.nearbyint.f32(float)
define float @test_nearbyint_f32(float %x) {
; CHECK-LABEL: name: test_nearbyint_f32
; CHECK: %{{[0-9]+}}:_(s32) = G_FNEARBYINT %{{[0-9]+}}
%y = call float @llvm.nearbyint.f32(float %x)
ret float %y
}
; CHECK-LABEL: name: test_llvm.aarch64.neon.ld3.v4i32.p0i32
; CHECK: %1:_(<4 x s32>), %2:_(<4 x s32>), %3:_(<4 x s32>) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.neon.ld3), %0(p0) :: (load 48 from %ir.ptr, align 64)
define void @test_llvm.aarch64.neon.ld3.v4i32.p0i32(i32* %ptr) {