forked from OSchip/llvm-project
[X86][SSE] Add support for lowering unary shuffles to PACKSS/PACKUS
Extension to D38472 llvm-svn: 314901
This commit is contained in:
Simon Pilgrim
parent
482d3f41e5
commit
bd5d2f0284
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@ -8683,24 +8683,36 @@ static SDValue lowerVectorShuffleWithPACK(const SDLoc &DL, MVT VT,
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MVT PackSVT = MVT::getIntegerVT(BitSize * 2);
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MVT PackVT = MVT::getVectorVT(PackSVT, NumElts / 2);
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// TODO - Add support for unary packs.
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SmallVector<int, 32> BinaryMask;
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createPackShuffleMask(VT, BinaryMask, false);
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if (isShuffleEquivalent(V1, V2, Mask, BinaryMask)) {
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SDValue VV1 = DAG.getBitcast(PackVT, V1);
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SDValue VV2 = DAG.getBitcast(PackVT, V2);
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if ((V1.isUndef() || DAG.ComputeNumSignBits(VV1) > BitSize) &&
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(V2.isUndef() || DAG.ComputeNumSignBits(VV2) > BitSize))
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auto LowerWithPACK = [&](SDValue N1, SDValue N2) {
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SDValue VV1 = DAG.getBitcast(PackVT, N1);
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SDValue VV2 = DAG.getBitcast(PackVT, N2);
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if ((N1.isUndef() || DAG.ComputeNumSignBits(VV1) > BitSize) &&
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(N2.isUndef() || DAG.ComputeNumSignBits(VV2) > BitSize))
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return DAG.getNode(X86ISD::PACKSS, DL, VT, VV1, VV2);
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if (Subtarget.hasSSE41() || PackSVT == MVT::i16) {
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APInt ZeroMask = APInt::getHighBitsSet(BitSize * 2, BitSize);
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if ((V1.isUndef() || DAG.MaskedValueIsZero(VV1, ZeroMask)) &&
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(V2.isUndef() || DAG.MaskedValueIsZero(VV2, ZeroMask)))
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if ((N1.isUndef() || DAG.MaskedValueIsZero(VV1, ZeroMask)) &&
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(N2.isUndef() || DAG.MaskedValueIsZero(VV2, ZeroMask)))
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return DAG.getNode(X86ISD::PACKUS, DL, VT, VV1, VV2);
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}
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}
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return SDValue();
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};
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// Try binary shuffle.
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SmallVector<int, 32> BinaryMask;
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createPackShuffleMask(VT, BinaryMask, false);
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if (isShuffleEquivalent(V1, V2, Mask, BinaryMask))
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if (SDValue Pack = LowerWithPACK(V1, V2))
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return Pack;
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// Try unary shuffle.
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SmallVector<int, 32> UnaryMask;
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createPackShuffleMask(VT, UnaryMask, true);
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if (isShuffleEquivalent(V1, V2, Mask, UnaryMask))
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if (SDValue Pack = LowerWithPACK(V1, V1))
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return Pack;
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return SDValue();
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}
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@ -8,15 +8,10 @@
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define i8 @v8i64(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c, <8 x i64> %d) {
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; SSE-LABEL: v8i64:
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; SSE: # BB#0:
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
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; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm11
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; SSE-NEXT: pcmpgtq %xmm7, %xmm3
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; SSE-NEXT: pcmpgtq %xmm6, %xmm2
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; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
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; SSE-NEXT: movdqa {{.*#+}} xmm3 = [0,1,4,5,4,5,6,7,0,1,4,5,8,9,12,13]
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; SSE-NEXT: pshufb %xmm3, %xmm2
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; SSE-NEXT: pcmpgtq %xmm5, %xmm1
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; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
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@ -24,24 +19,28 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c, <8 x i64> %d) {
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
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; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
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; SSE-NEXT: pcmpgtq %xmm7, %xmm3
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; SSE-NEXT: pcmpgtq %xmm6, %xmm2
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; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
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; SSE-NEXT: packssdw %xmm2, %xmm2
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; SSE-NEXT: pblendw {{.*#+}} xmm2 = xmm0[0,1,2,3],xmm2[4,5,6,7]
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; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm11
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; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm8
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; SSE-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,2],xmm11[0,2]
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; SSE-NEXT: pshufb %xmm3, %xmm8
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; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm11[0,2,2,3]
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; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
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; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm10
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; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm10[0,2,2,3]
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; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
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; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm9
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; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm9[0,2,2,3]
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; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
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; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
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; SSE-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm8[4,5,6,7]
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; SSE-NEXT: pand %xmm0, %xmm2
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; SSE-NEXT: psllw $15, %xmm2
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; SSE-NEXT: psraw $15, %xmm2
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; SSE-NEXT: packsswb %xmm0, %xmm2
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; SSE-NEXT: pmovmskb %xmm2, %eax
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; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm8
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; SSE-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,2],xmm9[0,2]
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; SSE-NEXT: packssdw %xmm8, %xmm8
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; SSE-NEXT: pblendw {{.*#+}} xmm8 = xmm1[0,1,2,3],xmm8[4,5,6,7]
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; SSE-NEXT: pand %xmm2, %xmm8
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; SSE-NEXT: psllw $15, %xmm8
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; SSE-NEXT: psraw $15, %xmm8
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; SSE-NEXT: packsswb %xmm0, %xmm8
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; SSE-NEXT: pmovmskb %xmm8, %eax
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; SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
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; SSE-NEXT: retq
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;
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@ -9345,11 +9345,6 @@ define <32 x i1> @test_cmp_v32i64(<32 x i64> %a0, <32 x i64> %a1) nounwind {
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; SSE42-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm13
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; SSE42-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm15
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; SSE42-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm12
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm7
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm6
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; SSE42-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm7[0,2]
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; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [0,1,4,5,4,5,6,7,0,1,4,5,8,9,12,13]
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; SSE42-NEXT: pshufb %xmm7, %xmm6
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm5
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; SSE42-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
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; SSE42-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,2,2,3,4,5,6,7]
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@ -9357,11 +9352,11 @@ define <32 x i1> @test_cmp_v32i64(<32 x i64> %a0, <32 x i64> %a1) nounwind {
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; SSE42-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
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; SSE42-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,3,4,5,6,7]
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; SSE42-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
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; SSE42-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1,2,3],xmm6[4,5,6,7]
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm3
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm2
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; SSE42-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
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; SSE42-NEXT: pshufb %xmm7, %xmm2
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm7
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm6
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; SSE42-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm7[0,2]
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; SSE42-NEXT: packssdw %xmm6, %xmm6
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; SSE42-NEXT: pblendw {{.*#+}} xmm6 = xmm4[0,1,2,3],xmm6[4,5,6,7]
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm1
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; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
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; SSE42-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
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@ -9369,127 +9364,132 @@ define <32 x i1> @test_cmp_v32i64(<32 x i64> %a0, <32 x i64> %a1) nounwind {
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; SSE42-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; SSE42-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
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; SSE42-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
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; SSE42-NEXT: packsswb %xmm4, %xmm0
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm3
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm2
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; SSE42-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
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; SSE42-NEXT: packssdw %xmm2, %xmm2
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; SSE42-NEXT: pblendw {{.*#+}} xmm2 = xmm0[0,1,2,3],xmm2[4,5,6,7]
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; SSE42-NEXT: packsswb %xmm6, %xmm2
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm12
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; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [0,1,8,9,2,3,10,11,8,9,12,13,10,11,14,15]
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; SSE42-NEXT: pshufb %xmm1, %xmm12
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; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,1,8,9,2,3,10,11,8,9,12,13,10,11,14,15]
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; SSE42-NEXT: pshufb %xmm0, %xmm12
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm15
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm13
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; SSE42-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,2],xmm15[0,2]
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; SSE42-NEXT: pshufb %xmm7, %xmm13
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; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,4,5,6,7,0,1,4,5,8,9,12,13]
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; SSE42-NEXT: pshufb %xmm1, %xmm13
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm14
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; SSE42-NEXT: pshufd {{.*#+}} xmm2 = xmm14[0,2,2,3]
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; SSE42-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
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; SSE42-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm13[4,5,6,7]
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; SSE42-NEXT: pblendw {{.*#+}} xmm2 = xmm12[0,1],xmm2[2,3,4,5,6,7]
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; SSE42-NEXT: pshufd {{.*#+}} xmm3 = xmm14[0,2,2,3]
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; SSE42-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
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; SSE42-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0,1,2,3],xmm13[4,5,6,7]
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; SSE42-NEXT: pblendw {{.*#+}} xmm3 = xmm12[0,1],xmm3[2,3,4,5,6,7]
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm8
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; SSE42-NEXT: pshufb %xmm1, %xmm8
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; SSE42-NEXT: pshufb %xmm0, %xmm8
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm11
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm9
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; SSE42-NEXT: shufps {{.*#+}} xmm9 = xmm9[0,2],xmm11[0,2]
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; SSE42-NEXT: pshufb %xmm7, %xmm9
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; SSE42-NEXT: pshufb %xmm1, %xmm9
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; SSE42-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm10
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; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm10[0,2,2,3]
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; SSE42-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,0,2,4,5,6,7]
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; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm9[4,5,6,7]
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; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm8[0,1],xmm1[2,3,4,5,6,7]
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; SSE42-NEXT: packsswb %xmm2, %xmm1
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; SSE42-NEXT: pextrb $15, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $14, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $13, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $12, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $11, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $10, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $9, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $8, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $7, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $6, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $5, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $4, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $3, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $2, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $1, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $0, %xmm1, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pshufd {{.*#+}} xmm0 = xmm10[0,2,2,3]
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; SSE42-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
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; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm9[4,5,6,7]
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; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm8[0,1],xmm0[2,3,4,5,6,7]
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; SSE42-NEXT: packsswb %xmm3, %xmm0
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; SSE42-NEXT: pextrb $15, %xmm0, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, (%rdi)
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $14, %xmm0, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, (%rdi)
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $13, %xmm0, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, (%rdi)
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; SSE42-NEXT: movb %al, 2(%rdi)
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; SSE42-NEXT: pextrb $12, %xmm0, %eax
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; SSE42-NEXT: andb $1, %al
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; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $11, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $10, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $9, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $8, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $7, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $6, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $5, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $4, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $3, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $2, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $1, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm0, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, 2(%rdi)
|
||||
; SSE42-NEXT: pextrb $15, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $14, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $13, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $12, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $11, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $10, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $9, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $8, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $7, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $6, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $5, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $4, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $3, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $2, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $1, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: pextrb $0, %xmm2, %eax
|
||||
; SSE42-NEXT: andb $1, %al
|
||||
; SSE42-NEXT: movb %al, (%rdi)
|
||||
; SSE42-NEXT: movq %rdi, %rax
|
||||
; SSE42-NEXT: retq
|
||||
|
|
|
|||
Loading…
Reference in New Issue