forked from OSchip/llvm-project
Rename class and clean up source.
No functional change intended. llvm-svn: 140664
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934b7d7645
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@ -1,4 +1,4 @@
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//===- SSEDomainFix.cpp - Use proper int/float domain for SSE ---*- C++ -*-===//
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//===- ExecutionDepsFix.cpp - Fix execution dependecy issues ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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@ -7,12 +7,14 @@
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the SSEDomainFix pass.
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// This file contains the execution dependency fix pass.
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//
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// Some SSE instructions like mov, and, or, xor are available in different
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// Some X86 SSE instructions like mov, and, or, xor are available in different
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// variants for different operand types. These variant instructions are
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// equivalent, but on Nehalem and newer cpus there is extra latency
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// transferring data between integer and floating point domains.
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// transferring data between integer and floating point domains. ARM cores
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// have similar issues when they are configured with both VFP and NEON
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// pipelines.
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//
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// This pass changes the variant instructions to minimize domain crossings.
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//
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@ -100,7 +102,7 @@ struct DomainValue {
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}
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namespace {
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class SSEDomainFixPass : public MachineFunctionPass {
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class ExeDepsFix : public MachineFunctionPass {
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static char ID;
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SpecificBumpPtrAllocator<DomainValue> Allocator;
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SmallVector<DomainValue*,16> Avail;
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@ -118,7 +120,7 @@ class SSEDomainFixPass : public MachineFunctionPass {
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unsigned Distance;
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public:
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SSEDomainFixPass(const TargetRegisterClass *rc)
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ExeDepsFix(const TargetRegisterClass *rc)
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: MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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@ -154,16 +156,16 @@ private:
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};
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}
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char SSEDomainFixPass::ID = 0;
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char ExeDepsFix::ID = 0;
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/// Translate TRI register number to an index into our smaller tables of
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/// interesting registers. Return -1 for boring registers.
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int SSEDomainFixPass::RegIndex(unsigned Reg) {
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int ExeDepsFix::RegIndex(unsigned Reg) {
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assert(Reg < AliasMap.size() && "Invalid register");
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return AliasMap[Reg];
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}
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DomainValue *SSEDomainFixPass::Alloc(int domain) {
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DomainValue *ExeDepsFix::Alloc(int domain) {
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DomainValue *dv = Avail.empty() ?
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new(Allocator.Allocate()) DomainValue :
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Avail.pop_back_val();
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@ -173,14 +175,14 @@ DomainValue *SSEDomainFixPass::Alloc(int domain) {
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return dv;
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}
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void SSEDomainFixPass::Recycle(DomainValue *dv) {
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void ExeDepsFix::Recycle(DomainValue *dv) {
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assert(dv && "Cannot recycle NULL");
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dv->clear();
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Avail.push_back(dv);
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}
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/// Set LiveRegs[rx] = dv, updating reference counts.
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void SSEDomainFixPass::SetLiveReg(int rx, DomainValue *dv) {
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void ExeDepsFix::SetLiveReg(int rx, DomainValue *dv) {
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assert(unsigned(rx) < NumRegs && "Invalid index");
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if (!LiveRegs) {
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LiveRegs = new DomainValue*[NumRegs];
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@ -198,7 +200,7 @@ void SSEDomainFixPass::SetLiveReg(int rx, DomainValue *dv) {
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}
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// Kill register rx, recycle or collapse any DomainValue.
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void SSEDomainFixPass::Kill(int rx) {
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void ExeDepsFix::Kill(int rx) {
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assert(unsigned(rx) < NumRegs && "Invalid index");
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if (!LiveRegs || !LiveRegs[rx]) return;
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@ -211,7 +213,7 @@ void SSEDomainFixPass::Kill(int rx) {
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}
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/// Force register rx into domain.
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void SSEDomainFixPass::Force(int rx, unsigned domain) {
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void ExeDepsFix::Force(int rx, unsigned domain) {
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assert(unsigned(rx) < NumRegs && "Invalid index");
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DomainValue *dv;
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if (LiveRegs && (dv = LiveRegs[rx])) {
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@ -220,8 +222,8 @@ void SSEDomainFixPass::Force(int rx, unsigned domain) {
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else if (dv->hasDomain(domain))
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Collapse(dv, domain);
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else {
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// This is an incompatible open DomainValue. Collapse it to whatever and force
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// the new value into domain. This costs a domain crossing.
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// This is an incompatible open DomainValue. Collapse it to whatever and
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// force the new value into domain. This costs a domain crossing.
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Collapse(dv, dv->getFirstDomain());
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assert(LiveRegs[rx] && "Not live after collapse?");
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LiveRegs[rx]->addDomain(domain);
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@ -234,7 +236,7 @@ void SSEDomainFixPass::Force(int rx, unsigned domain) {
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/// Collapse open DomainValue into given domain. If there are multiple
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/// registers using dv, they each get a unique collapsed DomainValue.
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void SSEDomainFixPass::Collapse(DomainValue *dv, unsigned domain) {
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void ExeDepsFix::Collapse(DomainValue *dv, unsigned domain) {
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assert(dv->hasDomain(domain) && "Cannot collapse");
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// Collapse all the instructions.
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@ -251,7 +253,7 @@ void SSEDomainFixPass::Collapse(DomainValue *dv, unsigned domain) {
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/// Merge - All instructions and registers in B are moved to A, and B is
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/// released.
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bool SSEDomainFixPass::Merge(DomainValue *A, DomainValue *B) {
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bool ExeDepsFix::Merge(DomainValue *A, DomainValue *B) {
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assert(!A->isCollapsed() && "Cannot merge into collapsed");
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assert(!B->isCollapsed() && "Cannot merge from collapsed");
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if (A == B)
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@ -269,7 +271,7 @@ bool SSEDomainFixPass::Merge(DomainValue *A, DomainValue *B) {
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return true;
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}
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void SSEDomainFixPass::enterBasicBlock() {
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void ExeDepsFix::enterBasicBlock() {
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// Try to coalesce live-out registers from predecessors.
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for (MachineBasicBlock::livein_iterator i = MBB->livein_begin(),
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e = MBB->livein_end(); i != e; ++i) {
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@ -306,7 +308,7 @@ void SSEDomainFixPass::enterBasicBlock() {
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// A hard instruction only works in one domain. All input registers will be
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// forced into that domain.
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void SSEDomainFixPass::visitHardInstr(MachineInstr *mi, unsigned domain) {
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void ExeDepsFix::visitHardInstr(MachineInstr *mi, unsigned domain) {
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// Collapse all uses.
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for (unsigned i = mi->getDesc().getNumDefs(),
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e = mi->getDesc().getNumOperands(); i != e; ++i) {
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}
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// A soft instruction can be changed to work in other domains given by mask.
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void SSEDomainFixPass::visitSoftInstr(MachineInstr *mi, unsigned mask) {
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void ExeDepsFix::visitSoftInstr(MachineInstr *mi, unsigned mask) {
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// Bitmask of available domains for this instruction after taking collapsed
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// operands into account.
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unsigned available = mask;
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}
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}
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void SSEDomainFixPass::visitGenericInstr(MachineInstr *mi) {
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// Process explicit defs, kill any XMM registers redefined.
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void ExeDepsFix::visitGenericInstr(MachineInstr *mi) {
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// Process explicit defs, kill any relevant registers redefined.
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for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
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MachineOperand &mo = mi->getOperand(i);
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if (!mo.isReg()) continue;
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}
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}
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bool SSEDomainFixPass::runOnMachineFunction(MachineFunction &mf) {
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bool ExeDepsFix::runOnMachineFunction(MachineFunction &mf) {
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MF = &mf;
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TII = MF->getTarget().getInstrInfo();
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TRI = MF->getTarget().getRegisterInfo();
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@ -454,7 +456,8 @@ bool SSEDomainFixPass::runOnMachineFunction(MachineFunction &mf) {
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Distance = 0;
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assert(NumRegs == RC->getNumRegs() && "Bad regclass");
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// If no XMM registers are used in the function, we can skip it completely.
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// If no relevant registers are used in the function, we can skip it
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// completely.
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bool anyregs = false;
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for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end();
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I != E; ++I)
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@ -516,5 +519,5 @@ bool SSEDomainFixPass::runOnMachineFunction(MachineFunction &mf) {
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FunctionPass *
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llvm::createExecutionDependencyFixPass(const TargetRegisterClass *RC) {
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return new SSEDomainFixPass(RC);
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return new ExeDepsFix(RC);
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}
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