[ARM64] Try and make the ELF MCJIT *slightly* less broken for ARM64.

A bunch of switch cases were missing, not just for ARM64 but also for
AArch64_BE. I've fixed all those, but there's zero testing as
ExecutionEngine tests are disabled when crosscompiling and I don't
have a native platform available to test on.

llvm-svn: 207626
This commit is contained in:
James Molloy 2014-04-30 10:15:41 +00:00
parent 7c39df37b2
commit bd2ffa0f6a
3 changed files with 11 additions and 3 deletions

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@ -516,7 +516,8 @@ void RuntimeDyldImpl::addRelocationForSymbol(const RelocationEntry &RE,
} }
uint8_t *RuntimeDyldImpl::createStubFunction(uint8_t *Addr) { uint8_t *RuntimeDyldImpl::createStubFunction(uint8_t *Addr) {
if (Arch == Triple::aarch64 || Arch == Triple::aarch64_be) { if (Arch == Triple::aarch64 || Arch == Triple::aarch64_be ||
Arch == Triple::arm64 || Arch == Triple::arm64_be) {
// This stub has to be able to access the full address space, // This stub has to be able to access the full address space,
// since symbol lookup won't necessarily find a handy, in-range, // since symbol lookup won't necessarily find a handy, in-range,
// PLT stub for functions which could be anywhere. // PLT stub for functions which could be anywhere.

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@ -866,6 +866,8 @@ void RuntimeDyldELF::resolveRelocation(const SectionEntry &Section,
break; break;
case Triple::aarch64: case Triple::aarch64:
case Triple::aarch64_be: case Triple::aarch64_be:
case Triple::arm64:
case Triple::arm64_be:
resolveAArch64Relocation(Section, Offset, Value, Type, Addend); resolveAArch64Relocation(Section, Offset, Value, Type, Addend);
break; break;
case Triple::arm: // Fall through. case Triple::arm: // Fall through.
@ -971,7 +973,8 @@ relocation_iterator RuntimeDyldELF::processRelocationRef(
DEBUG(dbgs() << "\t\tSectionID: " << SectionID << " Offset: " << Offset DEBUG(dbgs() << "\t\tSectionID: " << SectionID << " Offset: " << Offset
<< "\n"); << "\n");
if (Arch == Triple::aarch64 && if ((Arch == Triple::aarch64 || Arch == Triple::aarch64_be ||
Arch == Triple::arm64 || Arch == Triple::arm64_be) &&
(RelType == ELF::R_AARCH64_CALL26 || RelType == ELF::R_AARCH64_JUMP26)) { (RelType == ELF::R_AARCH64_CALL26 || RelType == ELF::R_AARCH64_JUMP26)) {
// This is an AArch64 branch relocation, need to use a stub function. // This is an AArch64 branch relocation, need to use a stub function.
DEBUG(dbgs() << "\t\tThis is an AArch64 branch relocation."); DEBUG(dbgs() << "\t\tThis is an AArch64 branch relocation.");
@ -1319,6 +1322,9 @@ size_t RuntimeDyldELF::getGOTEntrySize() {
switch (Arch) { switch (Arch) {
case Triple::x86_64: case Triple::x86_64:
case Triple::aarch64: case Triple::aarch64:
case Triple::aarch64_be:
case Triple::arm64:
case Triple::arm64_be:
case Triple::ppc64: case Triple::ppc64:
case Triple::ppc64le: case Triple::ppc64le:
case Triple::systemz: case Triple::systemz:

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@ -59,7 +59,8 @@ class RuntimeDyldELF : public RuntimeDyldImpl {
uint64_t Value, uint32_t Type, int64_t Addend); uint64_t Value, uint32_t Type, int64_t Addend);
unsigned getMaxStubSize() override { unsigned getMaxStubSize() override {
if (Arch == Triple::aarch64) if (Arch == Triple::aarch64 || Arch == Triple::arm64 ||
Arch == Triple::aarch64_be || Arch == Triple::arm64_be)
return 20; // movz; movk; movk; movk; br return 20; // movz; movk; movk; movk; br
if (Arch == Triple::arm || Arch == Triple::thumb) if (Arch == Triple::arm || Arch == Triple::thumb)
return 8; // 32-bit instruction and 32-bit address return 8; // 32-bit instruction and 32-bit address