forked from OSchip/llvm-project
[RISCV][NFC] Split out emitSelectPseudo from EmitInstrWithCustomInserter
It's cleaner and more consistent to have a separate helper function here. llvm-svn: 355772
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@ -787,22 +787,8 @@ static MachineBasicBlock *emitBuildPairF64Pseudo(MachineInstr &MI,
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return BB;
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}
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MachineBasicBlock *
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RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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MachineBasicBlock *BB) const {
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switch (MI.getOpcode()) {
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default:
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llvm_unreachable("Unexpected instr type to insert");
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case RISCV::Select_GPR_Using_CC_GPR:
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case RISCV::Select_FPR32_Using_CC_GPR:
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case RISCV::Select_FPR64_Using_CC_GPR:
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break;
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case RISCV::BuildPairF64Pseudo:
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return emitBuildPairF64Pseudo(MI, BB);
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case RISCV::SplitF64Pseudo:
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return emitSplitF64Pseudo(MI, BB);
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}
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static MachineBasicBlock *emitSelectPseudo(MachineInstr &MI,
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MachineBasicBlock *BB) {
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// To "insert" a SELECT instruction, we actually have to insert the triangle
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// control-flow pattern. The incoming instruction knows the destination vreg
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// to set, the condition code register to branch on, the true/false values to
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@ -862,6 +848,23 @@ RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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return TailMBB;
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}
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MachineBasicBlock *
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RISCVTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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MachineBasicBlock *BB) const {
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switch (MI.getOpcode()) {
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default:
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llvm_unreachable("Unexpected instr type to insert");
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case RISCV::Select_GPR_Using_CC_GPR:
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case RISCV::Select_FPR32_Using_CC_GPR:
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case RISCV::Select_FPR64_Using_CC_GPR:
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return emitSelectPseudo(MI, BB);
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case RISCV::BuildPairF64Pseudo:
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return emitBuildPairF64Pseudo(MI, BB);
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case RISCV::SplitF64Pseudo:
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return emitSplitF64Pseudo(MI, BB);
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}
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}
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// Calling Convention Implementation.
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// The expectations for frontend ABI lowering vary from target to target.
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// Ideally, an LLVM frontend would be able to avoid worrying about many ABI
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