forked from OSchip/llvm-project
[DAGCombiner] Merge FMUL Scalar and Vector constant canonicalization to RHS. NFCI.
llvm-svn: 234118
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@ -7539,13 +7539,6 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) {
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// This just handles C1 * C2 for vectors. Other vector folds are below.
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if (SDValue FoldedVOp = SimplifyVBinOp(N))
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return FoldedVOp;
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// Canonicalize vector constant to RHS.
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if (N0.getOpcode() == ISD::BUILD_VECTOR &&
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N1.getOpcode() != ISD::BUILD_VECTOR)
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if (auto *BV0 = dyn_cast<BuildVectorSDNode>(N0))
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if (BV0->isConstant())
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return DAG.getNode(N->getOpcode(), SDLoc(N), VT, N1, N0);
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}
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// fold (fmul c1, c2) -> c1*c2
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@ -7553,7 +7546,8 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) {
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return DAG.getNode(ISD::FMUL, SDLoc(N), VT, N0, N1);
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// canonicalize constant to RHS
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if (N0CFP && !N1CFP)
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if (isConstantFPBuildVectorOrConstantFP(N0) &&
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!isConstantFPBuildVectorOrConstantFP(N1))
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return DAG.getNode(ISD::FMUL, SDLoc(N), VT, N1, N0);
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// fold (fmul A, 1.0) -> A
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