forked from OSchip/llvm-project
parent
de6083463d
commit
bcf1d7faef
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@ -63,11 +63,18 @@ public:
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Instructions Insts;
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MachineBasicBlock *Prev, *Next;
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const BasicBlock *BB;
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std::vector<MachineBasicBlock *> Predecessors;
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std::vector<MachineBasicBlock *> Successors;
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int Number;
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MachineFunction *Parent;
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/// Predecessors/Successors - Keep track of the predecessor / successor
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/// basicblocks.
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std::vector<MachineBasicBlock *> Predecessors;
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std::vector<MachineBasicBlock *> Successors;
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/// LiveIns - Keep track of the physical registers that are livein of
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/// the basicblock.
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std::vector<unsigned> LiveIns;
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public:
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MachineBasicBlock(const BasicBlock *bb = 0) : Prev(0), Next(0), BB(bb),
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Number(-1), Parent(0) {
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@ -125,6 +132,19 @@ public:
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unsigned succ_size() const { return Successors.size(); }
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bool succ_empty() const { return Successors.empty(); }
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// LiveIn management methods.
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/// addLiveIn - Add the specified register as a live in. Note that it
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/// is an error to add the same register to the same set more than once.
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void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); }
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// Iteration support for live in sets. These sets are kept in sorted
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// order by their register number.
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typedef std::vector<unsigned>::const_iterator livein_iterator;
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livein_iterator livein_begin() const { return LiveIns.begin(); }
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livein_iterator livein_end() const { return LiveIns.end(); }
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bool livein_empty() const { return LiveIns.empty(); }
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// Code Layout methods.
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/// moveBefore/moveAfter - move 'this' block before or after the specified
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@ -15,6 +15,7 @@
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#include "llvm/BasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/TargetData.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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@ -89,8 +90,20 @@ void MachineBasicBlock::dump() const {
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print(*cerr.stream());
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}
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static inline void OutputReg(std::ostream &os, unsigned RegNo,
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const MRegisterInfo *MRI = 0) {
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if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
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if (MRI)
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os << " %" << MRI->get(RegNo).Name;
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else
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os << " %mreg(" << RegNo << ")";
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} else
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os << " %reg" << RegNo;
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}
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void MachineBasicBlock::print(std::ostream &OS) const {
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if(!getParent()) {
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const MachineFunction *MF = getParent();
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if(!MF) {
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OS << "Can't print out MachineBasicBlock because parent MachineFunction"
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<< " is null\n";
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return;
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@ -101,6 +114,14 @@ void MachineBasicBlock::print(std::ostream &OS) const {
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if (LBB) OS << LBB->getName();
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OS << " (" << (const void*)this
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<< ", LLVM BB @" << (const void*) LBB << ", ID#" << getNumber()<< "):\n";
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const MRegisterInfo *MRI = MF->getTarget().getRegisterInfo();
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if (livein_begin() != livein_end()) {
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OS << "Live Ins:";
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for (livein_iterator I = livein_begin(), E = livein_end(); I != E; ++I)
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OutputReg(OS, *I, MRI);
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OS << "\n";
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}
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// Print the preds of this block according to the CFG.
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if (!pred_empty()) {
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OS << " Predecessors according to CFG:";
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