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Compile CodeGen/X86/lea-3.ll:test2 to: 

_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret

llvm-svn: 35434
This commit is contained in:
Chris Lattner 2007-03-28 18:12:31 +00:00
parent 17331da6bd
commit bcd38852f2
1 changed files with 13 additions and 0 deletions
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13
llvm/lib/Target/X86/X86InstrInfo.cpp
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@ -149,6 +149,19 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
NewMI = BuildMI(get(X86::PSHUFDri), A).addReg(B).addImm(M); NewMI = BuildMI(get(X86::PSHUFDri), A).addReg(B).addImm(M);
break; break;
} }
case X86::SHL64ri: {
assert(MI->getNumOperands() == 3 && "Unknown shift instruction!");
// NOTE: LEA doesn't produce flags like shift does, but LLVM never uses
// the flags produced by a shift yet, so this is safe.
unsigned Dest = MI->getOperand(0).getReg();
unsigned Src = MI->getOperand(1).getReg();
unsigned ShAmt = MI->getOperand(2).getImm();
if (ShAmt == 0 || ShAmt >= 4) return 0;
NewMI = BuildMI(get(X86::LEA64r), Dest)
.addReg(0).addImm(1 << ShAmt).addReg(Src).addImm(0);
break;
}
case X86::SHL32ri: { case X86::SHL32ri: {
assert(MI->getNumOperands() == 3 && "Unknown shift instruction!"); assert(MI->getNumOperands() == 3 && "Unknown shift instruction!");
// NOTE: LEA doesn't produce flags like shift does, but LLVM never uses // NOTE: LEA doesn't produce flags like shift does, but LLVM never uses