forked from OSchip/llvm-project
[X86] remove derived method w/ same impl as base
Summary: While looking into issues with IfConverter, I noticed that X86InstrInfo::isUnpredicatedTerminator matched its overriden implementation in TargetInstrInfo::isUnpredicatedTerminator. Reviewers: craig.topper, hfinkel, MaskRay, echristo Reviewed By: MaskRay, echristo Subscribers: hiraditya, llvm-commits, srhines Tags: #llvm Differential Revision: https://reviews.llvm.org/D62749
This commit is contained in:
parent
6fab33b20a
commit
bc7f3240e6
|
@ -2863,17 +2863,6 @@ unsigned X86::getSwappedVCMPImm(unsigned Imm) {
|
|||
return Imm;
|
||||
}
|
||||
|
||||
bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr &MI) const {
|
||||
if (!MI.isTerminator()) return false;
|
||||
|
||||
// Conditional branch is a special case.
|
||||
if (MI.isBranch() && !MI.isBarrier())
|
||||
return true;
|
||||
if (!MI.isPredicable())
|
||||
return true;
|
||||
return !isPredicated(MI);
|
||||
}
|
||||
|
||||
bool X86InstrInfo::isUnconditionalTailCall(const MachineInstr &MI) const {
|
||||
switch (MI.getOpcode()) {
|
||||
case X86::TCRETURNdi:
|
||||
|
|
|
@ -305,7 +305,6 @@ public:
|
|||
const X86InstrFMA3Group &FMA3Group) const;
|
||||
|
||||
// Branch analysis.
|
||||
bool isUnpredicatedTerminator(const MachineInstr &MI) const override;
|
||||
bool isUnconditionalTailCall(const MachineInstr &MI) const override;
|
||||
bool canMakeTailCallConditional(SmallVectorImpl<MachineOperand> &Cond,
|
||||
const MachineInstr &TailCall) const override;
|
||||
|
|
Loading…
Reference in New Issue