forked from OSchip/llvm-project
Revert "[SystemZFrameLowering] Don't overrwrite R1D (backchain) when probing."
Temporarily reverted.
This reverts commit ea475c77ff
.
This commit is contained in:
parent
eaa9f6b2cc
commit
bc7a61b703
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@ -488,6 +488,15 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
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MFFrame.setStackSize(StackSize);
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MFFrame.setStackSize(StackSize);
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if (StackSize) {
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if (StackSize) {
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// Determine if we want to store a backchain.
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bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
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// If we need backchain, save current stack pointer. R1 is free at this
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// point.
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if (StoreBackchain)
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BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR))
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.addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
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// Allocate StackSize bytes.
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// Allocate StackSize bytes.
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int64_t Delta = -int64_t(StackSize);
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int64_t Delta = -int64_t(StackSize);
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const unsigned ProbeSize = TLI.getStackProbeSize(MF);
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const unsigned ProbeSize = TLI.getStackProbeSize(MF);
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@ -503,23 +512,18 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
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.addImm(StackSize);
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.addImm(StackSize);
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}
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}
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else {
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else {
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bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
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// If we need backchain, save current stack pointer. R1 is free at
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// this point.
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if (StoreBackchain)
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BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR))
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.addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
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emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
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emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
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buildCFAOffs(MBB, MBBI, DL, SPOffsetFromCFA + Delta, ZII);
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buildCFAOffs(MBB, MBBI, DL, SPOffsetFromCFA + Delta, ZII);
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if (StoreBackchain) {
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// The back chain is stored topmost with packed-stack.
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int Offset = usePackedStack(MF) ? SystemZMC::CallFrameSize - 8 : 0;
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BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::STG))
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.addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
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.addImm(Offset).addReg(0);
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}
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}
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}
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SPOffsetFromCFA += Delta;
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SPOffsetFromCFA += Delta;
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if (StoreBackchain) {
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// The back chain is stored topmost with packed-stack.
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int Offset = usePackedStack(MF) ? SystemZMC::CallFrameSize - 8 : 0;
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BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::STG))
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.addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
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.addImm(Offset).addReg(0);
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}
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}
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}
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if (HasFP) {
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if (HasFP) {
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@ -664,11 +668,6 @@ void SystemZFrameLowering::inlineStackProbe(MachineFunction &MF,
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.addMemOperand(MMO);
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.addMemOperand(MMO);
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};
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};
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bool StoreBackchain = MF.getFunction().hasFnAttribute("backchain");
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if (StoreBackchain)
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BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR))
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.addReg(SystemZ::R1D, RegState::Define).addReg(SystemZ::R15D);
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if (NumFullBlocks < 3) {
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if (NumFullBlocks < 3) {
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// Emit unrolled probe statements.
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// Emit unrolled probe statements.
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for (unsigned int i = 0; i < NumFullBlocks; i++)
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for (unsigned int i = 0; i < NumFullBlocks; i++)
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@ -678,11 +677,10 @@ void SystemZFrameLowering::inlineStackProbe(MachineFunction &MF,
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uint64_t LoopAlloc = ProbeSize * NumFullBlocks;
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uint64_t LoopAlloc = ProbeSize * NumFullBlocks;
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SPOffsetFromCFA -= LoopAlloc;
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SPOffsetFromCFA -= LoopAlloc;
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// Use R0D to hold the exit value.
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BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R1D)
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BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R0D)
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.addReg(SystemZ::R15D);
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.addReg(SystemZ::R15D);
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buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R0D, ZII);
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buildDefCFAReg(*MBB, MBBI, DL, SystemZ::R1D, ZII);
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emitIncrement(*MBB, MBBI, DL, SystemZ::R0D, -int64_t(LoopAlloc), ZII);
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emitIncrement(*MBB, MBBI, DL, SystemZ::R1D, -int64_t(LoopAlloc), ZII);
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buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::CallFrameSize + LoopAlloc),
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buildCFAOffs(*MBB, MBBI, DL, -int64_t(SystemZMC::CallFrameSize + LoopAlloc),
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ZII);
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ZII);
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@ -695,7 +693,7 @@ void SystemZFrameLowering::inlineStackProbe(MachineFunction &MF,
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MBB = LoopMBB;
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MBB = LoopMBB;
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allocateAndProbe(*MBB, MBB->end(), ProbeSize, false/*EmitCFI*/);
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allocateAndProbe(*MBB, MBB->end(), ProbeSize, false/*EmitCFI*/);
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BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::CLGR))
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BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::CLGR))
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.addReg(SystemZ::R15D).addReg(SystemZ::R0D);
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.addReg(SystemZ::R15D).addReg(SystemZ::R1D);
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BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::BRC))
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BuildMI(*MBB, MBB->end(), DL, ZII->get(SystemZ::BRC))
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.addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_GT).addMBB(MBB);
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.addImm(SystemZ::CCMASK_ICMP).addImm(SystemZ::CCMASK_CMP_GT).addMBB(MBB);
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@ -710,14 +708,6 @@ void SystemZFrameLowering::inlineStackProbe(MachineFunction &MF,
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if (Residual)
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if (Residual)
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allocateAndProbe(*MBB, MBBI, Residual, true/*EmitCFI*/);
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allocateAndProbe(*MBB, MBBI, Residual, true/*EmitCFI*/);
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if (StoreBackchain) {
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// The back chain is stored topmost with packed-stack.
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int Offset = usePackedStack(MF) ? SystemZMC::CallFrameSize - 8 : 0;
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BuildMI(*MBB, MBBI, DL, ZII->get(SystemZ::STG))
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.addReg(SystemZ::R1D, RegState::Kill).addReg(SystemZ::R15D)
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.addImm(Offset).addReg(0);
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}
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StackAllocMI->eraseFromParent();
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StackAllocMI->eraseFromParent();
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}
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}
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@ -92,14 +92,14 @@ define i32 @fun2(i32 %n) #0 "stack-probe-size"="4" {
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; CHECK-NEXT: stmg %r11, %r15, 88(%r15)
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; CHECK-NEXT: stmg %r11, %r15, 88(%r15)
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; CHECK-NEXT: .cfi_offset %r11, -72
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; CHECK-NEXT: .cfi_offset %r11, -72
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; CHECK-NEXT: .cfi_offset %r15, -40
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; CHECK-NEXT: .cfi_offset %r15, -40
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; CHECK-NEXT: lgr %r0, %r15
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; CHECK-NEXT: lgr %r1, %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r0
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; CHECK-NEXT: .cfi_def_cfa_register %r1
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; CHECK-NEXT: aghi %r0, -160
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; CHECK-NEXT: aghi %r1, -160
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; CHECK-NEXT: .cfi_def_cfa_offset 320
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; CHECK-NEXT: .cfi_def_cfa_offset 320
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; CHECK-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: aghi %r15, -8
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; CHECK-NEXT: aghi %r15, -8
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; CHECK-NEXT: cg %r0, 0(%r15)
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; CHECK-NEXT: cg %r0, 0(%r15)
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; CHECK-NEXT: clgrjh %r15, %r0, .LBB2_1
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; CHECK-NEXT: clgrjh %r15, %r1, .LBB2_1
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; CHECK-NEXT: # %bb.2:
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; CHECK-NEXT: # %bb.2:
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: lgr %r11, %r15
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; CHECK-NEXT: lgr %r11, %r15
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@ -48,14 +48,14 @@ define i32 @fun1() #0 {
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define i32 @fun2() #0 {
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define i32 @fun2() #0 {
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; CHECK-LABEL: fun2:
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; CHECK-LABEL: fun2:
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; CHECK: # %bb.0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lgr %r0, %r15
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; CHECK-NEXT: lgr %r1, %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r0
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; CHECK-NEXT: .cfi_def_cfa_register %r1
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; CHECK-NEXT: agfi %r0, -69632
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; CHECK-NEXT: agfi %r1, -69632
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; CHECK-NEXT: .cfi_def_cfa_offset 69792
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; CHECK-NEXT: .cfi_def_cfa_offset 69792
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; CHECK-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: aghi %r15, -4096
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; CHECK-NEXT: aghi %r15, -4096
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; CHECK-NEXT: cg %r0, 4088(%r15)
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; CHECK-NEXT: cg %r0, 4088(%r15)
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; CHECK-NEXT: clgrjh %r15, %r0, .LBB2_1
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; CHECK-NEXT: clgrjh %r15, %r1, .LBB2_1
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; CHECK-NEXT: # %bb.2:
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; CHECK-NEXT: # %bb.2:
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: aghi %r15, -2544
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; CHECK-NEXT: aghi %r15, -2544
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@ -81,15 +81,15 @@ define i32 @fun2() #0 {
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define void @fun3() #0 {
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define void @fun3() #0 {
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; CHECK-LABEL: fun3:
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; CHECK-LABEL: fun3:
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; CHECK: # %bb.0: # %entry
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lgr %r0, %r15
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; CHECK-NEXT: lgr %r1, %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r0
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; CHECK-NEXT: .cfi_def_cfa_register %r1
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; CHECK-NEXT: aghi %r0, -28672
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; CHECK-NEXT: aghi %r1, -28672
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; CHECK-NEXT: .cfi_def_cfa_offset 28832
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; CHECK-NEXT: .cfi_def_cfa_offset 28832
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; CHECK-NEXT: .LBB3_1: # %entry
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; CHECK-NEXT: .LBB3_1: # %entry
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: aghi %r15, -4096
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; CHECK-NEXT: aghi %r15, -4096
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; CHECK-NEXT: cg %r0, 4088(%r15)
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; CHECK-NEXT: cg %r0, 4088(%r15)
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; CHECK-NEXT: clgrjh %r15, %r0, .LBB3_1
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; CHECK-NEXT: clgrjh %r15, %r1, .LBB3_1
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: mvhi 180(%r15), 0
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; CHECK-NEXT: mvhi 180(%r15), 0
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@ -110,15 +110,15 @@ entry:
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define void @fun4() #0 "stack-probe-size"="8192" {
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define void @fun4() #0 "stack-probe-size"="8192" {
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; CHECK-LABEL: fun4:
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; CHECK-LABEL: fun4:
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; CHECK: # %bb.0: # %entry
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lgr %r0, %r15
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; CHECK-NEXT: lgr %r1, %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r0
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; CHECK-NEXT: .cfi_def_cfa_register %r1
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; CHECK-NEXT: aghi %r0, -24576
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; CHECK-NEXT: aghi %r1, -24576
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; CHECK-NEXT: .cfi_def_cfa_offset 24736
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; CHECK-NEXT: .cfi_def_cfa_offset 24736
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; CHECK-NEXT: .LBB4_1: # %entry
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; CHECK-NEXT: .LBB4_1: # %entry
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: aghi %r15, -8192
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; CHECK-NEXT: aghi %r15, -8192
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; CHECK-NEXT: cg %r0, 8184(%r15)
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; CHECK-NEXT: cg %r0, 8184(%r15)
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; CHECK-NEXT: clgrjh %r15, %r0, .LBB4_1
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; CHECK-NEXT: clgrjh %r15, %r1, .LBB4_1
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: aghi %r15, -7608
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; CHECK-NEXT: aghi %r15, -7608
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@ -166,15 +166,15 @@ entry:
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define void @fun6() #0 "stack-probe-size"="5" {
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define void @fun6() #0 "stack-probe-size"="5" {
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; CHECK-LABEL: fun6:
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; CHECK-LABEL: fun6:
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; CHECK: # %bb.0: # %entry
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lgr %r0, %r15
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; CHECK-NEXT: lgr %r1, %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r0
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; CHECK-NEXT: .cfi_def_cfa_register %r1
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; CHECK-NEXT: aghi %r0, -4184
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; CHECK-NEXT: aghi %r1, -4184
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; CHECK-NEXT: .cfi_def_cfa_offset 4344
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; CHECK-NEXT: .cfi_def_cfa_offset 4344
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; CHECK-NEXT: .LBB6_1: # %entry
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; CHECK-NEXT: .LBB6_1: # %entry
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: aghi %r15, -8
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; CHECK-NEXT: aghi %r15, -8
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; CHECK-NEXT: cg %r0, 0(%r15)
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; CHECK-NEXT: cg %r0, 0(%r15)
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; CHECK-NEXT: clgrjh %r15, %r0, .LBB6_1
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; CHECK-NEXT: clgrjh %r15, %r1, .LBB6_1
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: mvhi 180(%r15), 0
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; CHECK-NEXT: mvhi 180(%r15), 0
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@ -237,37 +237,6 @@ define i32 @fun8() #0 {
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ret i32 %c
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ret i32 %c
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}
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}
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define void @fun9() #0 "backchain" {
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; CHECK-LABEL: fun9:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lgr %r0, %r15
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; CHECK-NEXT: lgr %r1, %r15
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; CHECK-NEXT: .cfi_def_cfa_register %r0
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; CHECK-NEXT: aghi %r0, -28672
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; CHECK-NEXT: .cfi_def_cfa_offset 28832
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; CHECK-NEXT: .LBB9_1: # %entry
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: aghi %r15, -4096
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; CHECK-NEXT: cg %r0, 4088(%r15)
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; CHECK-NEXT: clgrjh %r15, %r0, .LBB9_1
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; CHECK-NEXT: # %bb.2: # %entry
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; CHECK-NEXT: .cfi_def_cfa_register %r15
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; CHECK-NEXT: stg %r1, 0(%r15)
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; CHECK-NEXT: mvhi 180(%r15), 0
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; CHECK-NEXT: l %r0, 180(%r15)
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; CHECK-NEXT: aghi %r15, 28672
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; CHECK-NEXT: br %r14
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entry:
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%stack = alloca [7122 x i32], align 4
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%i = alloca i32, align 4
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%0 = bitcast [7122 x i32]* %stack to i8*
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%i.0.i.0..sroa_cast = bitcast i32* %i to i8*
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store volatile i32 0, i32* %i, align 4
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%i.0.i.0.6 = load volatile i32, i32* %i, align 4
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ret void
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}
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declare i32 @foo()
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declare i32 @foo()
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attributes #0 = { "probe-stack"="inline-asm" }
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attributes #0 = { "probe-stack"="inline-asm" }
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