forked from OSchip/llvm-project
[DAGCombiner] split trunc from extend in hoistLogicOpWithSameOpcodeHands; NFC
This duplicates several shared checks, but we need to split this up to fix underlying bugs in smaller steps. llvm-svn: 348627
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@ -3729,39 +3729,54 @@ SDValue DAGCombiner::hoistLogicOpWithSameOpcodeHands(SDNode *N) {
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SDValue Y = N1.getOperand(0);
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EVT XVT = X.getValueType();
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SDLoc DL(N);
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switch (HandOpcode) {
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case ISD::ANY_EXTEND:
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case ISD::TRUNCATE:
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case ISD::ZERO_EXTEND:
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case ISD::SIGN_EXTEND:
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// If both operands have other uses, this transform would create extra
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// instructions without eliminating anything.
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if (!N0.hasOneUse() && !N1.hasOneUse())
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return SDValue();
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// We need matching integer source types.
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// Do not hoist logic op inside of a vector extend, since it may combine
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// into a vsetcc.
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// TODO: Should the vector check apply to truncate though?
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if (VT.isVector() || XVT != Y.getValueType())
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return SDValue();
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// Don't create an illegal op during or after legalization.
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if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT))
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return SDValue();
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// Avoid infinite looping with PromoteIntBinOp.
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if (HandOpcode == ISD::ANY_EXTEND && LegalTypes &&
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!TLI.isTypeDesirableForOp(LogicOpcode, XVT))
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return SDValue();
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// Be extra careful sinking truncate.
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// TODO: Should we apply desirable/legal constraints to all opcodes?
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if (HandOpcode == ISD::TRUNCATE) {
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if (TLI.isZExtFree(VT, XVT) && TLI.isTruncateFree(XVT, VT))
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return SDValue();
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if (!TLI.isTypeLegal(XVT))
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return SDValue();
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}
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// logic_op (hand_op X), (hand_op Y) --> hand_op (logic_op X, Y)
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SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);
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return DAG.getNode(HandOpcode, DL, VT, Logic);
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if (HandOpcode == ISD::ANY_EXTEND || HandOpcode == ISD::ZERO_EXTEND ||
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HandOpcode == ISD::SIGN_EXTEND) {
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// If both operands have other uses, this transform would create extra
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// instructions without eliminating anything.
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if (!N0.hasOneUse() && !N1.hasOneUse())
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return SDValue();
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// We need matching integer source types.
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// Do not hoist logic op inside of a vector extend, since it may combine
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// into a vsetcc.
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// TODO: Should the vector check apply to truncate though?
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if (VT.isVector() || XVT != Y.getValueType())
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return SDValue();
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// Don't create an illegal op during or after legalization.
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if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT))
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return SDValue();
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// Avoid infinite looping with PromoteIntBinOp.
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// TODO: Should we apply desirable/legal constraints to all opcodes?
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if (HandOpcode == ISD::ANY_EXTEND && LegalTypes &&
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!TLI.isTypeDesirableForOp(LogicOpcode, XVT))
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return SDValue();
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// logic_op (hand_op X), (hand_op Y) --> hand_op (logic_op X, Y)
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SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);
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return DAG.getNode(HandOpcode, DL, VT, Logic);
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}
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// logic_op (truncate x), (truncate y) --> truncate (logic_op x, y)
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if (HandOpcode == ISD::TRUNCATE) {
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// If both operands have other uses, this transform would create extra
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// instructions without eliminating anything.
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if (!N0.hasOneUse() && !N1.hasOneUse())
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return SDValue();
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// We need matching integer source types.
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// Do not hoist logic op inside of a vector extend, since it may combine
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// into a vsetcc.
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// TODO: Should the vector check apply to truncate though?
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if (VT.isVector() || XVT != Y.getValueType())
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return SDValue();
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// Don't create an illegal op during or after legalization.
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if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT))
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return SDValue();
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// Be extra careful sinking truncate. If it's free, there's no benefit in
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// widening a binop. Also, don't create a logic op on an illegal type.
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if (TLI.isZExtFree(VT, XVT) && TLI.isTruncateFree(XVT, VT))
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return SDValue();
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if (!TLI.isTypeLegal(XVT))
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return SDValue();
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SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);
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return DAG.getNode(HandOpcode, DL, VT, Logic);
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}
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// For binops SHL/SRL/SRA/AND:
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