forked from OSchip/llvm-project
[mips] Use libatomic instead of GCC intrinsics for 64bit
The following GCC intrinsics are not available on MIPS32: __sync_fetch_and_add_8 __sync_fetch_and_and_8 __sync_fetch_and_or_8 __sync_val_compare_and_swap_8 Replace these with appropriate libatomic implementation. Patch by Miodrag Dinic. Differential Revision: https://reviews.llvm.org/D45691 llvm-svn: 355687
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@ -533,32 +533,56 @@ extern kmp_real64 __kmp_xchg_real64(volatile kmp_real64 *p, kmp_real64 v);
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__sync_fetch_and_add((volatile kmp_int32 *)(p), 1)
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#define KMP_TEST_THEN_INC_ACQ32(p) \
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__sync_fetch_and_add((volatile kmp_int32 *)(p), 1)
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#if defined(KMP_ARCH_MIPS)
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#define KMP_TEST_THEN_INC64(p) \
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__atomic_fetch_add((volatile kmp_int64 *)(p), 1LL, __ATOMIC_SEQ_CST)
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#define KMP_TEST_THEN_INC_ACQ64(p) \
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__atomic_fetch_add((volatile kmp_int64 *)(p), 1LL, __ATOMIC_SEQ_CST)
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#else
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#define KMP_TEST_THEN_INC64(p) \
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__sync_fetch_and_add((volatile kmp_int64 *)(p), 1LL)
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#define KMP_TEST_THEN_INC_ACQ64(p) \
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__sync_fetch_and_add((volatile kmp_int64 *)(p), 1LL)
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#endif
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#define KMP_TEST_THEN_ADD4_32(p) \
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__sync_fetch_and_add((volatile kmp_int32 *)(p), 4)
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#define KMP_TEST_THEN_ADD4_ACQ32(p) \
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__sync_fetch_and_add((volatile kmp_int32 *)(p), 4)
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#if defined(KMP_ARCH_MIPS)
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#define KMP_TEST_THEN_ADD4_64(p) \
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__atomic_fetch_add((volatile kmp_int64 *)(p), 4LL, __ATOMIC_SEQ_CST)
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#define KMP_TEST_THEN_ADD4_ACQ64(p) \
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__atomic_fetch_add((volatile kmp_int64 *)(p), 4LL, __ATOMIC_SEQ_CST)
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#define KMP_TEST_THEN_DEC64(p) \
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__atomic_fetch_sub((volatile kmp_int64 *)(p), 1LL, __ATOMIC_SEQ_CST)
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#define KMP_TEST_THEN_DEC_ACQ64(p) \
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__atomic_fetch_sub((volatile kmp_int64 *)(p), 1LL, __ATOMIC_SEQ_CST)
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#else
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#define KMP_TEST_THEN_ADD4_64(p) \
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__sync_fetch_and_add((volatile kmp_int64 *)(p), 4LL)
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#define KMP_TEST_THEN_ADD4_ACQ64(p) \
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__sync_fetch_and_add((volatile kmp_int64 *)(p), 4LL)
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#define KMP_TEST_THEN_DEC32(p) \
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__sync_fetch_and_sub((volatile kmp_int32 *)(p), 1)
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#define KMP_TEST_THEN_DEC_ACQ32(p) \
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__sync_fetch_and_sub((volatile kmp_int32 *)(p), 1)
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#define KMP_TEST_THEN_DEC64(p) \
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__sync_fetch_and_sub((volatile kmp_int64 *)(p), 1LL)
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#define KMP_TEST_THEN_DEC_ACQ64(p) \
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__sync_fetch_and_sub((volatile kmp_int64 *)(p), 1LL)
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#endif
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#define KMP_TEST_THEN_DEC32(p) \
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__sync_fetch_and_sub((volatile kmp_int32 *)(p), 1)
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#define KMP_TEST_THEN_DEC_ACQ32(p) \
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__sync_fetch_and_sub((volatile kmp_int32 *)(p), 1)
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#define KMP_TEST_THEN_ADD8(p, v) \
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__sync_fetch_and_add((volatile kmp_int8 *)(p), (kmp_int8)(v))
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#define KMP_TEST_THEN_ADD32(p, v) \
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__sync_fetch_and_add((volatile kmp_int32 *)(p), (kmp_int32)(v))
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#if defined(KMP_ARCH_MIPS)
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#define KMP_TEST_THEN_ADD64(p, v) \
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__atomic_fetch_add((volatile kmp_uint64 *)(p), (kmp_uint64)(v), \
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__ATOMIC_SEQ_CST)
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#else
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#define KMP_TEST_THEN_ADD64(p, v) \
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__sync_fetch_and_add((volatile kmp_int64 *)(p), (kmp_int64)(v))
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#endif
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#define KMP_TEST_THEN_OR8(p, v) \
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__sync_fetch_and_or((volatile kmp_int8 *)(p), (kmp_int8)(v))
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@ -568,10 +592,19 @@ extern kmp_real64 __kmp_xchg_real64(volatile kmp_real64 *p, kmp_real64 v);
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__sync_fetch_and_or((volatile kmp_uint32 *)(p), (kmp_uint32)(v))
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#define KMP_TEST_THEN_AND32(p, v) \
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__sync_fetch_and_and((volatile kmp_uint32 *)(p), (kmp_uint32)(v))
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#if defined(KMP_ARCH_MIPS)
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#define KMP_TEST_THEN_OR64(p, v) \
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__atomic_fetch_or((volatile kmp_uint64 *)(p), (kmp_uint64)(v), \
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__ATOMIC_SEQ_CST)
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#define KMP_TEST_THEN_AND64(p, v) \
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__atomic_fetch_and((volatile kmp_uint64 *)(p), (kmp_uint64)(v), \
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__ATOMIC_SEQ_CST)
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#else
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#define KMP_TEST_THEN_OR64(p, v) \
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__sync_fetch_and_or((volatile kmp_uint64 *)(p), (kmp_uint64)(v))
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#define KMP_TEST_THEN_AND64(p, v) \
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__sync_fetch_and_and((volatile kmp_uint64 *)(p), (kmp_uint64)(v))
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#endif
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#define KMP_COMPARE_AND_STORE_ACQ8(p, cv, sv) \
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__sync_bool_compare_and_swap((volatile kmp_uint8 *)(p), (kmp_uint8)(cv), \
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@ -591,12 +624,6 @@ extern kmp_real64 __kmp_xchg_real64(volatile kmp_real64 *p, kmp_real64 v);
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#define KMP_COMPARE_AND_STORE_REL32(p, cv, sv) \
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__sync_bool_compare_and_swap((volatile kmp_uint32 *)(p), (kmp_uint32)(cv), \
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(kmp_uint32)(sv))
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#define KMP_COMPARE_AND_STORE_ACQ64(p, cv, sv) \
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__sync_bool_compare_and_swap((volatile kmp_uint64 *)(p), (kmp_uint64)(cv), \
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(kmp_uint64)(sv))
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#define KMP_COMPARE_AND_STORE_REL64(p, cv, sv) \
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__sync_bool_compare_and_swap((volatile kmp_uint64 *)(p), (kmp_uint64)(cv), \
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(kmp_uint64)(sv))
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#define KMP_COMPARE_AND_STORE_PTR(p, cv, sv) \
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__sync_bool_compare_and_swap((void *volatile *)(p), (void *)(cv), \
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(void *)(sv))
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@ -610,9 +637,38 @@ extern kmp_real64 __kmp_xchg_real64(volatile kmp_real64 *p, kmp_real64 v);
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#define KMP_COMPARE_AND_STORE_RET32(p, cv, sv) \
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__sync_val_compare_and_swap((volatile kmp_uint32 *)(p), (kmp_uint32)(cv), \
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(kmp_uint32)(sv))
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#if defined(KMP_ARCH_MIPS)
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static inline bool mips_sync_bool_compare_and_swap(
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volatile kmp_uint64 *p, kmp_uint64 cv, kmp_uint64 sv) {
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return __atomic_compare_exchange(p, &cv, &sv, false, __ATOMIC_SEQ_CST,
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__ATOMIC_SEQ_CST);
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}
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static inline bool mips_sync_val_compare_and_swap(
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volatile kmp_uint64 *p, kmp_uint64 cv, kmp_uint64 sv) {
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__atomic_compare_exchange(p, &cv, &sv, false, __ATOMIC_SEQ_CST,
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__ATOMIC_SEQ_CST);
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return cv;
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}
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#define KMP_COMPARE_AND_STORE_ACQ64(p, cv, sv) \
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mips_sync_bool_compare_and_swap((volatile kmp_uint64 *)(p), (kmp_uint64)(cv),\
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(kmp_uint64)(sv))
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#define KMP_COMPARE_AND_STORE_REL64(p, cv, sv) \
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mips_sync_bool_compare_and_swap((volatile kmp_uint64 *)(p), (kmp_uint64)(cv),\
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(kmp_uint64)(sv))
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#define KMP_COMPARE_AND_STORE_RET64(p, cv, sv) \
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mips_sync_val_compare_and_swap((volatile kmp_uint64 *)(p), (kmp_uint64)(cv), \
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(kmp_uint64)(sv))
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#else
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#define KMP_COMPARE_AND_STORE_ACQ64(p, cv, sv) \
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__sync_bool_compare_and_swap((volatile kmp_uint64 *)(p), (kmp_uint64)(cv), \
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(kmp_uint64)(sv))
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#define KMP_COMPARE_AND_STORE_REL64(p, cv, sv) \
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__sync_bool_compare_and_swap((volatile kmp_uint64 *)(p), (kmp_uint64)(cv), \
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(kmp_uint64)(sv))
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#define KMP_COMPARE_AND_STORE_RET64(p, cv, sv) \
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__sync_val_compare_and_swap((volatile kmp_uint64 *)(p), (kmp_uint64)(cv), \
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(kmp_uint64)(sv))
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#endif
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#define KMP_XCHG_FIXED8(p, v) \
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__sync_lock_test_and_set((volatile kmp_uint8 *)(p), (kmp_uint8)(v))
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